Analysis & Synthesis Settings Reports

Reports default and user-specified Analysis & Synthesis settings specified in the Analysis & Synthesis Settings page of the Settings dialog box. The Analysis & Synthesis Settings report includes a subset of the possible settings; the exact content depends on the design and target device.

Reports the names and settings of the default parameters specified in the Default Parameters page of the Settings dialog box.

Reports the names of Analysis & Synthesis source files read, including the file name and path, the file type, whether the source file is used in the netlist, and the absolute directory path of the file. Source files reported may not actually contribute to the project. For example, an optimization process could render some files useless, and while Analysis & Synthesis still reads the files, it does not process them. This report helps you to distinguish between source files that are used in the netlist generated by the project, and files that merely reside in the project directory. Files added to the project during Analysis & Synthesis automatically by Quartus only appear in the report if they are used in the netlist.

Other files which can be written to the project directory, but not used in the netlist, include files such as Quartus Prime Standard Edition Project File (.qpf) Definition, Quartus Prime Standard Edition Settings File (.qsf) Definition, debug files, Memory Initialization File (.mif) Definition, constraint files, Programmer Object File (.pof) Definition, and SRAM Object File (.sof) Definition.

Reports the LPM Parameter settings by entity instance, listing name and value, for specific megafunctions separated into the following folders:

• PLLs—Reports parameters for the altpll megafunction.
• Multipliers—Reports parameters for the lpm_mult, altmult_add, altmult_accum, and altfp_mult megafunctions.
• FIFOs—Reports parameters for scfifo and dcfifo megafunctions.
• Shift Registers—Reports parameters for lpm_shiftreg and altshift_taps megafunctions.

Reports the parameter settings for each entity instance. Parameters are listed in the order in which they were declared in the entity. The report includes the parameter Name, its Value, and the Type.

Reports assignments created from synthesis attributes in for Verilog, VHDL, or AHDL source files and includes the Assignment name, the assignment Value, the source instance the assignment is From, and the destination instance the assignment is pointing To.