ID:12122 Can't remap PLL LVDS receiver or LVDS transmitter WYSIWYG primitive "<name>" due to invalid multiplier and divide ratios in clk0, clk1, and/or clk2 ports

CAUSE: You changed the target device family for a design, and compiled the design. The design instantiated a PLL that feeds the specified LVDS receiver or LVDS transmitter WYSIWYG primitive for the old target device family. While remapping the PLL from the old target device family to the new target device family, the Quartus Prime software cannot remap the WYSIWYG primitive because the multiplier and divide ratios you specified for the clk0, clk1, and/or clk2 ports on the WYSIWYG primitive are not valid for LVDS mode. This error often occurs when you do not generate the original design using the altlvds_rx or altlvds_tx megafunction.

ACTION: Set the multiplier and divide ratios for the WYSIWYG primitive clk0, clk1 and clk2 ports to values that are valid for LVDS mode. To avoid receiving this message in the future, use the altlvds_rx or altlvds_tx megafunction when generating the design that instantiates the PLL.