List of Messages
Parent topic: List of Messages

ID:12081 Fan-in of WYSIWYG ClockLock PLL primitive "<name>" can fan-out only to WYSIWYG ClockLock PLL primitives with the same input frequency value

CAUSE: The input that feeds the specified WYSIWYG ClockLock PLL primitive also fans out to other locations that do not have the same input frequency value as the WYSIWYG ClockLock PLL primitive. However, the fan-in of a WYSIWYG ClockLock PLL primitive can fan-out only to other WYSIWYG ClockLock PLL primitives with the same input frequency value.

ACTION: Edit the design to remove any fan-in to a WYSIWYG ClockLock PLL primitive that does not fan-out to a WYSIWYG ClockLock PLL primitive with the same input frequency value.

Parent topic: List of Messages

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