List of Messages
Parent topic: List of Messages

ID:186371 Can't place enhanced PLL "<name>" in PLL location <name> because PLL uses EXTCLK pin ("<name>") and therefore its CLK0 signal ("<name>") cannot access regional clock

CAUSE: You assigned a global clock but not regional clock in that PLL location.

ACTION: Change the Global Signal assignment on the specified CLK0 signal to use global clock, or assign the specified PLL to a different enhanced PLL location.

Parent topic: List of Messages

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