A logic option that specifies the maximum number of LABs the asynchronous signal at the To register can cross before insertion of a new pipeline register. Due to congestion or over-filled LABs, the requirements may not be met, causing register placement failure.
Use the Automatic Asynchronous Signal Pipelining Register Reach logic option when Automatic Asynchronous Signal Pipelining is enabled.
This option is available for all Altera devices.
Scripting Information |
Keyword:async_pipeline_reg_reach Settings:<integer> |