clkmgr_clkmgrp Summary

Base Address: 0xFFD04000

Register Address Offset	Bit Fields
`i_clk_mgr_clkmgr`
`ctrl` `0x0`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`						`swctrlbtclksel` `RW 0x0`	`swctrlbtclken` `RW 0x0`	`Reserved`							`bootmode` `RW 0x1`
`intr` `0x4`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`				`perpllfbslip` `RW 0x0`	`mainpllfbslip` `RW 0x0`	`perpllrfslip` `RW 0x0`	`mainpllrfslip` `RW 0x0`	`Reserved`				`perplllost` `RW 0x0`	`mainplllost` `RW 0x0`	`perpllachieved` `RW 0x0`	`mainpllachieved` `RW 0x0`
`intrs` `0x8`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`				`perpllfbslip` `RW 0x0`	`mainpllfbslip` `RW 0x0`	`perpllrfslip` `RW 0x0`	`mainpllrfslip` `RW 0x0`	`Reserved`				`perplllost` `RW 0x0`	`mainplllost` `RW 0x0`	`perpllachieved` `RW 0x0`	`mainpllachieved` `RW 0x0`
`intrr` `0xC`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`				`perpllfbslip` `RW 0x0`	`mainpllfbslip` `RW 0x0`	`perpllrfslip` `RW 0x0`	`mainpllrfslip` `RW 0x0`	`Reserved`				`perplllost` `RW 0x0`	`mainplllost` `RW 0x0`	`perpllachieved` `RW 0x0`	`mainpllachieved` `RW 0x0`
`intren` `0x10`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`				`perpllfbslip` `RW 0x0`	`mainpllfbslip` `RW 0x0`	`perpllrfslip` `RW 0x0`	`mainpllrfslip` `RW 0x0`	`Reserved`				`perplllost` `RW 0x0`	`mainplllost` `RW 0x0`	`perpllachieved` `RW 0x0`	`mainpllachieved` `RW 0x0`
`intrens` `0x14`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`				`perpllfbslip` `RW 0x0`	`mainpllfbslip` `RW 0x0`	`perpllrfslip` `RW 0x0`	`mainpllrfslip` `RW 0x0`	`Reserved`				`perplllost` `RW 0x0`	`mainplllost` `RW 0x0`	`perpllachieved` `RW 0x0`	`mainpllachieved` `RW 0x0`
`intrenr` `0x18`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`				`perpllfbslip` `RW 0x0`	`mainpllfbslip` `RW 0x0`	`perpllrfslip` `RW 0x0`	`mainpllrfslip` `RW 0x0`	`Reserved`				`perplllost` `RW 0x0`	`mainplllost` `RW 0x0`	`perpllachieved` `RW 0x0`	`mainpllachieved` `RW 0x0`
`stat` `0x1C`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`														`bootclksrc` `RO 0x0`	`bootmode` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`						`perplllocked` `RO 0x0`	`mainplllocked` `RO 0x0`	`Reserved`							`busy` `RO 0x0`
`testioctrl` `0x20`	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`											`debugclksel` `RW 0x10`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`				`periclksel` `RW 0x8`				`Reserved`				`mainclksel` `RW 0x8`