GITS0 Summary

Contains registers with the GITS0 prefix.

Base Address: 0x1D040000


Register Address Offset	Bit Fields
`i_aps_gic__gic_axi4_slave__1d000000__GITS0`
`GITS0_CTLR` `0x0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Quiescent` `RO 0x1`	`RESERVED0` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED0` `RO 0x0`															`Enabled` `RW 0x0`
`GITS0_IIDR` `0x4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ProductID` `RO 0x2`								`RESERVED0` `RO 0x0`				`Variant` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Revision` `RO 0x7`				`Implementer` `RO 0x43B`
`GITS0_TYPER` `0x8` 64-bit	63	62	61	60	59	58	57	56	55	54	53	52	51	50	49	48
	`RESERVED1` `RO 0x0`
	47	46	45	44	43	42	41	40	39	38	37	36	35	34	33	32
	`RESERVED1` `RO 0x0`											`CIL` `RO 0x0`	`CIDBits` `RO 0x0`
	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`HCC` `RO 0x0`								`RESERVED2` `RO 0x0`				`PTA` `RO 0x0`	`SEIS` `RO 0x0`	`DevBits` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DevBits` `RO 0x0`			`IDBits` `RO 0x0`					`ITTEntrySize` `RO 0x0`				`RESERVED0` `RO 0x0`	`CCT` `RO 0x0`	`Virtual` `RO 0x0`	`Physical` `RO 0x0`
`GITS0_FCTLR` `0x32` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DCC` `RW 0x0`	`PWE` `RW 0x0`	`RESERVED2` `RO 0x0`											`IEC` `RW 0x0`	`IDC` `RW 0x0`	`ICC` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED1` `RO 0x0`				`DMA` `RW 0x0`	`RESERVED0` `RO 0x0`	`QD` `RW 0x0`	`AEE` `RW 0x0`	`CGO` `RW 0x0`				`CEE` `RW 0x0`	`UEE` `RW 0x0`	`LTE` `RW 0x0`	`SIP` `RW 0x0`
`GITS0_OPR` `0x40` 64-bit	63	62	61	60	59	58	57	56	55	54	53	52	51	50	49	48
	`LOCK_TYPE` `RW 0x0`				`RESERVED1` `RW 0x0`								`DEVICE_ID` `RW 0x0`
	47	46	45	44	43	42	41	40	39	38	37	36	35	34	33	32
	`DEVICE_ID` `RW 0x0`
	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EVENT_ID` `RW 0x0`
`GITS0_OPSR` `0x48` 64-bit	63	62	61	60	59	58	57	56	55	54	53	52	51	50	49	48
	`REQUEST_COMPLETE` `RO 0x0`	`REQUEST_PASS` `RO 0x0`	`REQUEST_IN_PROGRESS` `RO 0x0`	`RESERVED2` `RO 0x0`												`ENTRY_LOCKED` `RO 0x0`
	47	46	45	44	43	42	41	40	39	38	37	36	35	34	33	32
	`RESERVED1` `RO 0x0`			`TARGET` `RO 0x0`
	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED0` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PID` `RO 0x0`
`GITS0_CBASER` `0x128` 64-bit	63	62	61	60	59	58	57	56	55	54	53	52	51	50	49	48
	`Valid` `RW 0x0`	`RESERVED3` `RW 0x0`	`Cacheability` `RW 0x0`			`RESERVED1` `RW 0x0`			`OuterCacheability` `RW 0x0`			`RESERVED2` `RW 0x0`
	47	46	45	44	43	42	41	40	39	38	37	36	35	34	33	32
	`RESERVED2` `RW 0x0`
	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PhysicalAddress` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PhysicalAddress` `RW 0x0`				`Shareablity` `RW 0x0`		`RESERVED0` `RW 0x0`		`Size` `RW 0x0`
`GITS0_CWRITER` `0x136` 64-bit	63	62	61	60	59	58	57	56	55	54	53	52	51	50	49	48
	`RESERVED1` `RO 0x0`
	47	46	45	44	43	42	41	40	39	38	37	36	35	34	33	32
	`RESERVED1` `RO 0x0`
	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED1` `RO 0x0`												`Offset` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Offset` `RW 0x0`											`RESERVED0` `RO 0x0`				`Retry` `WO 0x0`
`GITS0_CREADR` `0x144` 64-bit	63	62	61	60	59	58	57	56	55	54	53	52	51	50	49	48
	`RESERVED1` `RO 0x0`
	47	46	45	44	43	42	41	40	39	38	37	36	35	34	33	32
	`RESERVED1` `RO 0x0`
	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED1` `RO 0x0`												`Offset` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Offset` `RO 0x0`											`RESERVED0` `RO 0x0`				`Stalled` `RO 0x0`
`GITS0_BASER0` `0x256` 64-bit	63	62	61	60	59	58	57	56	55	54	53	52	51	50	49	48
	`Valid` `RW 0x0`	`Indirect` `RW 0x0`	`Cacheability` `RW 0x0`			`Type` `RW 0x0`			`OuterCacheability` `RW 0x0`			`EntrySize` `RW 0x0`
	47	46	45	44	43	42	41	40	39	38	37	36	35	34	33	32
	`RESERVED0` `RW 0x0`
	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PhysicalAddress` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PhysicalAddress` `RW 0x0`				`Shareability` `RW 0x0`		`PageSize` `RW 0x0`		`Size` `RW 0x0`
`GITS0_BASER1` `0x264` 64-bit	63	62	61	60	59	58	57	56	55	54	53	52	51	50	49	48
	`Valid` `RW 0x0`	`Indirect` `RW 0x0`	`Cacheability` `RW 0x0`			`Type` `RW 0x0`			`OuterCacheability` `RW 0x0`			`EntrySize` `RW 0x0`
	47	46	45	44	43	42	41	40	39	38	37	36	35	34	33	32
	`RESERVED0` `RW 0x0`
	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PhysicalAddress` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PhysicalAddress` `RW 0x0`				`Shareability` `RW 0x0`		`PageSize` `RW 0x0`		`Size` `RW 0x0`
`GITS0_CFGID` `0x61440` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Event_Cache_Index_Bits` `RO 0x7`				`Device_Cache_Index_Bits` `RO 0x4`				`Collection_Cache_Index_Bits` `RO 0x3`				`RESERVED0` `RO 0x0`	`Cache_ECC` `RO 0x1`	`Low_Latency_Support` `RO 0x1`	`MSI_64` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Target_Bits` `RO 0x2`				`LPI_Credit_Count` `RO 0x0`				`ITS_NUMBER` `RO 0x0`
`GITS0_PIDR4` `0x65488` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED0` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED0` `RO 0x0`								`SIZE` `RO 0x4`				`DES_2` `RO 0x4`
`GITS0_PIDR5` `0x65492` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED0` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED0` `RO 0x0`								`RESERVED` `RO 0x0`
`GITS0_PIDR6` `0x65496` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED0` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED0` `RO 0x0`								`RESERVED` `RO 0x0`
`GITS0_PIDR7` `0x65500` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED0` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED0` `RO 0x0`								`RESERVED` `RO 0x0`
`GITS0_PIDR0` `0x65504` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED0` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED0` `RO 0x0`								`PART_0` `RO 0x94`
`GITS0_PIDR1` `0x65508` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED0` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED0` `RO 0x0`								`DES_0` `RO 0xB`				`PART_1` `RO 0x4`
`GITS0_PIDR2` `0x65512` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED0` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED0` `RO 0x0`								`REVISION` `RO 0x3`				`JEDEC` `RO 0x1`	`DES_1` `RO 0x3`
`GITS0_PIDR3` `0x65516` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED1` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED1` `RO 0x0`								`REVAND` `RO 0x0`				`RESERVED0` `RO 0x0`	`CMOD` `RO 0x0`
`GITS0_CIDR0` `0x65520` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED0` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED0` `RO 0x0`								`PRMBL_0` `RO 0xD`
`GITS0_CIDR1` `0x65524` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED0` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED0` `RO 0x0`								`CLASS` `RO 0xF`				`PRMBL_1` `RO 0x0`
`GITS0_CIDR2` `0x65528` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED0` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED0` `RO 0x0`								`PRMBL_2` `RO 0x5`
`GITS0_CIDR3` `0x65532` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED0` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED0` `RO 0x0`								`PRMBL_3` `RO 0xB1`