GITS0_OPR

         GITS0_OPR


Module Instance	Base Address	Register Address
`i_aps_gic__gic_axi4_slave__1d000000__GITS0`	`0x1D040000`	`0x1D040028`

Size: 64

Offset: 0x28

Access: RW

Important: The value of a reserved bit must be maintained in software. When you modify registers containing reserved bit fields, you must use a read-modify-write operation to preserve state and prevent indeterminate system behavior.


Bit Fields
63	62	61	60	59	58	57	56	55	54	53	52	51	50	49	48
`LOCK_TYPE` `RW 0x0`				`RESERVED1` `RW 0x0`								`DEVICE_ID` `RW 0x0`
47	46	45	44	43	42	41	40	39	38	37	36	35	34	33	32
`DEVICE_ID` `RW 0x0`
31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
`RESERVED0` `RW 0x0`
15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
`EVENT_ID` `RW 0x0`

GITS0_OPR Fields


Bit	Name	Description	Access	Reset
63:60	`LOCK_TYPE`	LOCK_TYPE	`RW`	`0x0`
59:52	`RESERVED1`	RESERVED1	`RW`	`0x0`
51:32	`DEVICE_ID`	DEVICE_ID	`RW`	`0x0`
31:16	`RESERVED0`	RESERVED0	`RW`	`0x0`
15:0	`EVENT_ID`	EVENT_ID	`RW`	`0x0`