USBcore Summary

Internal register map

Module Instance	Base Address
`i_usbotg_0_DWC_otg_intreg`	`0xFFB00000`
`i_usbotg_1_DWC_otg_intreg`	`0xFFB40000`

Register Address Offset	Bit Fields
`i_usbotg_0_DWC_otg_intreg`
`GOTGCTL` `0x0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`				`Reserved`						`CurMod` `RO 0x0`	`OTGVer` `RW 0x0`	`BSesVld` `RO 0x0`	`ASesVld` `RO 0x0`	`DbncTime` `RO 0x0`	`ConIDSts` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`			`EHEn` `RW 0x0`	`DevHNPEn` `RW 0x0`	`HstSetHNPEn` `RW 0x0`	`HNPReq` `RW 0x0`	`HstNegScs` `RO 0x0`	`BvalidOvVal` `RW 0x0`	`BvalidOvEn` `RW 0x0`	`AvalidOvVal` `RW 0x0`	`AvalidOvEn` `RW 0x0`	`VbvalidOvVal` `RW 0x0`	`VbvalidOvEn` `RW 0x0`	`SesReq` `RW 0x0`	`SesReqScs` `RO 0x0`
`GOTGINT` `0x4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`											`Reserved`	`DbnceDone` `RW 0x0`	`ADevTOUTChg` `RW 0x0`	`HstNegDet` `RW 0x0`	`RESERVED1` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED1` `RO 0x0`						`HstNegSucStsChng` `RW 0x0`	`SesReqSucStsChng` `RW 0x0`	`RESERVED2` `RO 0x0`					`SesEndDet` `RW 0x0`	`RESERVED3` `RO 0x0`
`GAHBCFG` `0x8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED1` `RO 0x0`							`InvDescEndianess` `RW 0x0`	`AHBSingle` `RW 0x0`	`NotiAllDmaWrit` `RW 0x0`	`RemMemSupp` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`PTxFEmpLvl` `RW 0x0`	`NPTxFEmpLvl` `RW 0x0`	`RESERVED` `RO 0x0`	`DMAEn` `RW 0x0`	`HBstLen` `RW 0x0`				`GlblIntrMsk` `RW 0x0`
`GUSBCFG` `0xC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`CorruptTxPkt` `WO 0x0`	`ForceDevMode` `RW 0x0`	`ForceHstMode` `RW 0x0`	`TxEndDelay` `RW 0x0`	`Reserved`	`IC_USBCap` `RO 0x0`	`ULPI` `RW 0x0`	`Indicator` `RW 0x0`	`Complement` `RW 0x0`	`TermSelDLPulse` `RW 0x0`	`ULPIExtVbusIndicator` `RW 0x0`	`ULPIExtVbusDrv` `RW 0x0`	`ULPIClkSusM` `RW 0x0`	`ULPIAutoRes` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`RESERVED` `RO 0x0`	`USBTrdTim` `RW 0x5`				`HNPCap` `RW 0x0`	`SRPCap` `RW 0x0`	`DDRSel` `RW 0x0`	`PHYSel` `RO 0x0`	`FSIntf` `RO 0x0`	`ULPI_UTMI_Sel` `RO 0x1`	`PHYIf` `RO 0x0`	`TOutCal` `RW 0x0`
`GRSTCTL` `0x10` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`AHBIdle` `RO 0x1`	`DMAReq` `RO 0x0`	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`					`TxFNum` `RW 0x0`					`TxFFlsh` `RW 0x0`	`RxFFlsh` `RW 0x0`	`Reserved`	`FrmCntrRst` `RW 0x0`	`PIUFSSftRst` `RW 0x0`	`CSftRst` `RW 0x0`
`GINTSTS` `0x14` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`WkUpInt` `RW 0x0`	`SessReqInt` `RW 0x0`	`DisconnInt` `RW 0x0`	`ConIDStsChng` `RW 0x1`	`Reserved`	`PTxFEmp` `RO 0x1`	`HChInt` `RO 0x0`	`PrtInt` `RO 0x0`	`ResetDet` `RW 0x0`	`FetSusp` `RW 0x0`	`incomplP` `RW 0x0`	`incompISOIN` `RW 0x0`	`OEPInt` `RO 0x0`	`IEPInt` `RO 0x0`	`EPMis` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EOPF` `RW 0x0`	`ISOOutDrop` `RW 0x0`	`EnumDone` `RW 0x0`	`USBRst` `RW 0x0`	`USBSusp` `RW 0x0`	`ErlySusp` `RW 0x0`	`Reserved`		`GOUTNakEff` `RO 0x0`	`GINNakEff` `RO 0x0`	`NPTxFEmp` `RO 0x1`	`RxFLvl` `RO 0x0`	`Sof` `RW 0x0`	`OTGInt` `RO 0x0`	`ModeMis` `RW 0x0`	`CurMod` `RO 0x0`
`GINTMSK` `0x18` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`WkUpIntMsk` `RW 0x0`	`SessReqIntMsk` `RW 0x0`	`DisconnIntMsk` `RW 0x0`	`ConIDStsChngMsk` `RW 0x0`	`Reserved`	`PTxFEmpMsk` `RW 0x0`	`HChIntMsk` `RW 0x0`	`PrtIntMsk` `RW 0x0`	`ResetDetMsk` `RW 0x0`	`FetSuspMsk` `RW 0x0`	`incomplPMsK` `RW 0x0`	`incompISOINMsk` `RW 0x0`	`OEPIntMsk` `RW 0x0`	`IEPIntMsk` `RW 0x0`	`EPMisMsk` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EOPFMsk` `RW 0x0`	`ISOOutDropMsk` `RW 0x0`	`EnumDoneMsk` `RW 0x0`	`USBRstMsk` `RW 0x0`	`USBSuspMsk` `RW 0x0`	`ErlySuspMsk` `RW 0x0`	`Reserved`		`GOUTNakEffMsk` `RW 0x0`	`GINNakEffMsk` `RW 0x0`	`NPTxFEmpMsk` `RW 0x0`	`RxFLvlMsk` `RW 0x0`	`SofMsk` `RW 0x0`	`OTGIntMsk` `RW 0x0`	`ModeMisMsk` `RW 0x0`	`RESERVED` `RO 0x0`
`GRXSTSR` `0x1C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`RESERVED` `RO 0x0`						`FN` `RO 0x0`				`PktSts` `RO 0x0`				`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DPID` `RO 0x0`	`BCnt` `RO 0x0`											`ChNum` `RO 0x0`
`GRXSTSP` `0x20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`RESERVED` `RO 0x0`						`FN` `RO 0x0`				`PktSts` `RO 0x0`				`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DPID` `RO 0x0`	`BCnt` `RO 0x0`											`ChNum` `RO 0x0`
`GRXFSIZ` `0x24` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`				`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`RxFDep` `RW 0x2000`
`GNPTXFSIZ` `0x28` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NPTXFDep` `RW 0x2000`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`NPTXFStAddr` `RW 0x2000`
`GNPTXSTS` `0x2C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`NPTxQTop` `RO 0x0`							`NPTxQSpcAvail` `RO 0x8`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`NPTxFSpcAvail` `RO 0x2000`
`GPVNDCTL` `0x34` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DisUlpiDrvr` `RW 0x0`	`RESERVED` `RO 0x0`			`VStsDone` `RW 0x0`	`VStsBsy` `RO 0x0`	`NewRegReq` `RW 0x0`	`RESERVED1` `RO 0x0`		`RegWr` `RW 0x0`	`RegAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`VCtrl` `RW 0x0`								`RegData` `RW 0x0`
`GGPIO` `0x38` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`GPO` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`GPI` `RO 0x0`
`GUID` `0x3C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`GUID` `RO 0x12345678`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`GUID` `RO 0x12345678`
`GSNPSID` `0x40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SynopsysID` `RO 0x4F54330A`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`SynopsysID` `RO 0x4F54330A`
`GHWCFG1` `0x44` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EpDir` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EpDir` `RO 0x0`
`GHWCFG2` `0x48` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`TknQDepth` `RO 0x8`					`PTxQDepth` `RO 0x3`		`NPTxQDepth` `RO 0x2`		`RESERVED` `RO 0x0`	`MultiProcIntrpt` `RO 0x0`	`DynFifoSizing` `RO 0x1`	`PerioSupport` `RO 0x1`	`NumHstChnl` `RO 0xF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`NumHstChnl` `RO 0xF`		`NumDevEps` `RO 0xF`				`FSPhyType` `RO 0x0`		`HSPhyType` `RO 0x2`		`SingPnt` `RO 0x0`	`OtgArch` `RO 0x2`		`OtgMode` `RO 0x0`
`GHWCFG3` `0x4C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DfifoDepth` `RO 0x1F80`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`LPMMode` `RO 0x0`	`BCSupport` `RO 0x0`	`HSICMode` `RO 0x0`	`ADPSupport` `RO 0x0`	`RstType` `RO 0x0`	`OptFeature` `RO 0x0`	`VndctlSupt` `RO 0x1`	`I2CIntSel` `RO 0x0`	`OtgEn` `RO 0x1`	`PktSizeWidth` `RO 0x6`			`XferSizeWidth` `RO 0x8`
`GHWCFG4` `0x50` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DescDMA` `RO 0x1`	`DescDMAEnabled` `RO 0x1`	`INEps` `RO 0xF`				`DedFifoMode` `RO 0x1`	`SessEndFltr` `RO 0x0`	`BValidFltr` `RO 0x0`	`AValidFltr` `RO 0x0`	`VBusValidFltr` `RO 0x0`	`IddgFltr` `RO 0x0`	`NumCtlEps` `RO 0xF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PhyDataWidth` `RO 0x0`		`RESERVED` `RO 0x0`						`ExtendedHibernation` `RO 0x0`	`Hibernation` `RO 0x0`	`AhbFreq` `RO 0x1`	`PartialPwrDn` `RO 0x0`	`NumDevPerioEps` `RO 0x0`
`GDFIFOCFG` `0x5C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPInfoBaseAddr` `RW 0x1F80`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`GDFIFOCfg` `RW 0x2000`
`HPTXFSIZ` `0x100` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`PTxFSize` `RW 0x2000`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`PTxFStAddr` `RW 0x4000`
`DIEPTXF1` `0x104` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`INEPnTxFDep` `RW 0x2000`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`INEPnTxFStAddr` `RW 0x4000`
`DIEPTXF2` `0x108` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`INEPnTxFDep` `RW 0x2000`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`INEPnTxFStAddr` `RW 0x6000`
`DIEPTXF3` `0x10C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`INEPnTxFDep` `RW 0x2000`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPnTxFStAddr` `RW 0x8000`
`DIEPTXF4` `0x110` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`INEPnTxFDep` `RW 0x2000`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPnTxFStAddr` `RW 0xA000`
`DIEPTXF5` `0x114` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`INEPnTxFDep` `RW 0x2000`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPnTxFStAddr` `RW 0xC000`
`DIEPTXF6` `0x118` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`INEPnTxFDep` `RW 0x2000`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPnTxFStAddr` `RW 0xE000`
`DIEPTXF7` `0x11C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`INEPnTxFDep` `RW 0x2000`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPnTxFStAddr` `RW 0x0`
`DIEPTXF8` `0x120` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`INEPnTxFDep` `RW 0x2000`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPnTxFStAddr` `RW 0x2000`
`DIEPTXF9` `0x124` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`INEPnTxFDep` `RW 0x2000`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPnTxFStAddr` `RW 0x4000`
`DIEPTXF10` `0x128` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`INEPnTxFDep` `RW 0x2000`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPnTxFStAddr` `RW 0x6000`
`DIEPTXF11` `0x12C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`INEPnTxFDep` `RW 0x2000`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPnTxFStAddr` `RW 0x8000`
`DIEPTXF12` `0x130` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`INEPnTxFDep` `RW 0x2000`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPnTxFStAddr` `RW 0xA000`
`DIEPTXF13` `0x134` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`INEPnTxFDep` `RW 0x2000`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPnTxFStAddr` `RW 0xC000`
`DIEPTXF14` `0x138` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`INEPnTxFDep` `RW 0x2000`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPnTxFStAddr` `RW 0xE000`
`DIEPTXF15` `0x13C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`INEPnTxFDep` `RW 0x2000`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPnTxFStAddr` `RW 0x0`
`HCFG` `0x400` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ModeChTimEn` `RW 0x0`	`RESERVED` `RO 0x0`				`PerSchedEna` `RW 0x0`	`FrListEn` `RW 0x0`		`DescDMA` `RW 0x0`	`RESERVED1` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ResValid` `RW 0x2`								`Ena32KHzS` `RW 0x0`	`RESERVED2` `RO 0x0`				`FSLSSupp` `RW 0x0`	`FSLSPclkSel` `RW 0x0`
`HFIR` `0x404` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`															`HFIRRldCtrl` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`FrInt` `RW 0xEA60`
`HFNUM` `0x408` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`FrRem` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`FrNum` `RO 0x3FFF`
`HPTXSTS` `0x410` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PTxQTop` `RO 0x0`								`PTxQSpcAvail` `RO 0x10`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PTxFSpcAvail` `RO 0x2000`
`HAINT` `0x414` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HAINT` `RO 0x0`
`HAINTMSK` `0x418` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HAINTMsk` `RW 0x0`
`HFLBAddr` `0x41C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`HFLBAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HFLBAddr` `RW 0x0`
`HPRT` `0x440` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`													`PrtSpd` `RO 0x0`		`PrtTstCtl` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PrtTstCtl` `RW 0x0`			`PrtPwr` `RW 0x0`	`PrtLnSts` `RO 0x0`		`RESERVED` `RO 0x0`	`PrtRst` `RW 0x0`	`PrtSusp` `RW 0x0`	`PrtRes` `RW 0x0`	`PrtOvrCurrChng` `RW 0x0`	`PrtOvrCurrAct` `RO 0x0`	`PrtEnChng` `RW 0x0`	`PrtEna` `RW 0x0`	`PrtConnDet` `RW 0x0`	`PrtConnSts` `RO 0x0`
`HCCHAR0` `0x500` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ChEna` `RW 0x0`	`ChDis` `RW 0x0`	`OddFrm` `RW 0x0`	`DevAddr` `RW 0x0`							`EC` `RW 0x0`		`EPType` `RW 0x0`		`LSpdDev` `RW 0x0`	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EPDir` `RW 0x0`	`EPNum` `RW 0x0`				`MPS` `RW 0x0`
`HCSPLT0` `0x504` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SpltEna` `RW 0x0`	`RESERVED` `RO 0x0`														`CompSplt` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XactPos` `RW 0x0`		`HubAddr` `RW 0x0`							`PrtAddr` `RW 0x0`
`HCINT0` `0x508` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`DESC_LST_ROLLIntr` `RW 0x0`	`XCS_XACT_ERR` `RW 0x0`	`BNAIntr` `RW 0x0`	`DataTglErr` `RW 0x0`	`FrmOvrun` `RW 0x0`	`BblErr` `RW 0x0`	`XactErr` `RW 0x0`	`NYET` `RW 0x0`	`ACK` `RW 0x0`	`NAK` `RW 0x0`	`STALL` `RW 0x0`	`AHBErr` `RW 0x0`	`ChHltd` `RW 0x0`	`XferCompl` `RW 0x0`
`HCINTMSK0` `0x50C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`FRM_LST_ROLLIntrMsk` `RW 0x0`	`RESERVED1` `RO 0x0`	`BNAIntrMsk` `RW 0x0`	`DataTglErrMsk` `RW 0x0`	`FrmOvrunMsk` `RW 0x0`	`BblErrMsk` `RW 0x0`	`XactErrMsk` `RW 0x0`	`NyetMsk` `RW 0x0`	`AckMsk` `RW 0x0`	`NakMsk` `RW 0x0`	`StallMsk` `RW 0x0`	`AHBErrMsk` `RW 0x0`	`ChHltdMsk` `RW 0x0`	`XferComplMsk` `RW 0x0`
`HCTSIZ0` `0x510` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DoPng` `RW 0x0`	`Pid` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`HCDMA0` `0x514` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`HCDMAB0` `0x51C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`HCDMAB` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HCDMAB` `RW 0x0`
`HCCHAR1` `0x520` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ChEna` `RW 0x0`	`ChDis` `RW 0x0`	`OddFrm` `RW 0x0`	`DevAddr` `RW 0x0`							`EC` `RW 0x0`		`EPType` `RW 0x0`		`LSpdDev` `RW 0x0`	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EPDir` `RW 0x0`	`EPNum` `RW 0x0`				`MPS` `RW 0x0`
`HCSPLT1` `0x524` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SpltEna` `RW 0x0`	`RESERVED` `RO 0x0`														`CompSplt` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XactPos` `RW 0x0`		`HubAddr` `RW 0x0`							`PrtAddr` `RW 0x0`
`HCINT1` `0x528` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`DESC_LST_ROLLIntr` `RW 0x0`	`XCS_XACT_ERR` `RW 0x0`	`BNAIntr` `RW 0x0`	`DataTglErr` `RW 0x0`	`FrmOvrun` `RW 0x0`	`BblErr` `RW 0x0`	`XactErr` `RW 0x0`	`NYET` `RW 0x0`	`ACK` `RW 0x0`	`NAK` `RW 0x0`	`STALL` `RW 0x0`	`AHBErr` `RW 0x0`	`ChHltd` `RW 0x0`	`XferCompl` `RW 0x0`
`HCINTMSK1` `0x52C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`FRM_LST_ROLLIntrMsk` `RW 0x0`	`RESERVED1` `RO 0x0`	`BNAIntrMsk` `RW 0x0`	`DataTglErrMsk` `RW 0x0`	`FrmOvrunMsk` `RW 0x0`	`BblErrMsk` `RW 0x0`	`XactErrMsk` `RW 0x0`	`NyetMsk` `RW 0x0`	`AckMsk` `RW 0x0`	`NakMsk` `RW 0x0`	`StallMsk` `RW 0x0`	`AHBErrMsk` `RW 0x0`	`ChHltdMsk` `RW 0x0`	`XferComplMsk` `RW 0x0`
`HCTSIZ1` `0x530` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DoPng` `RW 0x0`	`Pid` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`HCDMA1` `0x534` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`HCDMAB1` `0x53C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`HCDMAB` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HCDMAB` `RW 0x0`
`HCCHAR2` `0x540` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ChEna` `RW 0x0`	`ChDis` `RW 0x0`	`OddFrm` `RW 0x0`	`DevAddr` `RW 0x0`							`EC` `RW 0x0`		`EPType` `RW 0x0`		`LSpdDev` `RW 0x0`	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EPDir` `RW 0x0`	`EPNum` `RW 0x0`				`MPS` `RW 0x0`
`HCSPLT2` `0x544` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SpltEna` `RW 0x0`	`RESERVED` `RO 0x0`														`CompSplt` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XactPos` `RW 0x0`		`HubAddr` `RW 0x0`							`PrtAddr` `RW 0x0`
`HCINT2` `0x548` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`DESC_LST_ROLLIntr` `RW 0x0`	`XCS_XACT_ERR` `RW 0x0`	`BNAIntr` `RW 0x0`	`DataTglErr` `RW 0x0`	`FrmOvrun` `RW 0x0`	`BblErr` `RW 0x0`	`XactErr` `RW 0x0`	`NYET` `RW 0x0`	`ACK` `RW 0x0`	`NAK` `RW 0x0`	`STALL` `RW 0x0`	`AHBErr` `RW 0x0`	`ChHltd` `RW 0x0`	`XferCompl` `RW 0x0`
`HCINTMSK2` `0x54C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`FRM_LST_ROLLIntrMsk` `RW 0x0`	`RESERVED1` `RO 0x0`	`BNAIntrMsk` `RW 0x0`	`DataTglErrMsk` `RW 0x0`	`FrmOvrunMsk` `RW 0x0`	`BblErrMsk` `RW 0x0`	`XactErrMsk` `RW 0x0`	`NyetMsk` `RW 0x0`	`AckMsk` `RW 0x0`	`NakMsk` `RW 0x0`	`StallMsk` `RW 0x0`	`AHBErrMsk` `RW 0x0`	`ChHltdMsk` `RW 0x0`	`XferComplMsk` `RW 0x0`
`HCTSIZ2` `0x550` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DoPng` `RW 0x0`	`Pid` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`HCDMA2` `0x554` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`HCDMAB2` `0x55C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`HCDMAB` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HCDMAB` `RW 0x0`
`HCCHAR3` `0x560` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ChEna` `RW 0x0`	`ChDis` `RW 0x0`	`OddFrm` `RW 0x0`	`DevAddr` `RW 0x0`							`EC` `RW 0x0`		`EPType` `RW 0x0`		`LSpdDev` `RW 0x0`	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EPDir` `RW 0x0`	`EPNum` `RW 0x0`				`MPS` `RW 0x0`
`HCSPLT3` `0x564` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SpltEna` `RW 0x0`	`RESERVED` `RO 0x0`														`CompSplt` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XactPos` `RW 0x0`		`HubAddr` `RW 0x0`							`PrtAddr` `RW 0x0`
`HCINT3` `0x568` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`DESC_LST_ROLLIntr` `RW 0x0`	`XCS_XACT_ERR` `RW 0x0`	`BNAIntr` `RW 0x0`	`DataTglErr` `RW 0x0`	`FrmOvrun` `RW 0x0`	`BblErr` `RW 0x0`	`XactErr` `RW 0x0`	`NYET` `RW 0x0`	`ACK` `RW 0x0`	`NAK` `RW 0x0`	`STALL` `RW 0x0`	`AHBErr` `RW 0x0`	`ChHltd` `RW 0x0`	`XferCompl` `RW 0x0`
`HCINTMSK3` `0x56C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`FRM_LST_ROLLIntrMsk` `RW 0x0`	`RESERVED1` `RO 0x0`	`BNAIntrMsk` `RW 0x0`	`DataTglErrMsk` `RW 0x0`	`FrmOvrunMsk` `RW 0x0`	`BblErrMsk` `RW 0x0`	`XactErrMsk` `RW 0x0`	`NyetMsk` `RW 0x0`	`AckMsk` `RW 0x0`	`NakMsk` `RW 0x0`	`StallMsk` `RW 0x0`	`AHBErrMsk` `RW 0x0`	`ChHltdMsk` `RW 0x0`	`XferComplMsk` `RW 0x0`
`HCTSIZ3` `0x570` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DoPng` `RW 0x0`	`Pid` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`HCDMA3` `0x574` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`HCDMAB3` `0x57C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`HCDMAB` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HCDMAB` `RW 0x0`
`HCCHAR4` `0x580` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ChEna` `RW 0x0`	`ChDis` `RW 0x0`	`OddFrm` `RW 0x0`	`DevAddr` `RW 0x0`							`EC` `RW 0x0`		`EPType` `RW 0x0`		`LSpdDev` `RW 0x0`	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EPDir` `RW 0x0`	`EPNum` `RW 0x0`				`MPS` `RW 0x0`
`HCSPLT4` `0x584` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SpltEna` `RW 0x0`	`RESERVED` `RO 0x0`														`CompSplt` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XactPos` `RW 0x0`		`HubAddr` `RW 0x0`							`PrtAddr` `RW 0x0`
`HCINT4` `0x588` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`DESC_LST_ROLLIntr` `RW 0x0`	`XCS_XACT_ERR` `RW 0x0`	`BNAIntr` `RW 0x0`	`DataTglErr` `RW 0x0`	`FrmOvrun` `RW 0x0`	`BblErr` `RW 0x0`	`XactErr` `RW 0x0`	`NYET` `RW 0x0`	`ACK` `RW 0x0`	`NAK` `RW 0x0`	`STALL` `RW 0x0`	`AHBErr` `RW 0x0`	`ChHltd` `RW 0x0`	`XferCompl` `RW 0x0`
`HCINTMSK4` `0x58C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`FRM_LST_ROLLIntrMsk` `RW 0x0`	`RESERVED1` `RO 0x0`	`BNAIntrMsk` `RW 0x0`	`DataTglErrMsk` `RW 0x0`	`FrmOvrunMsk` `RW 0x0`	`BblErrMsk` `RW 0x0`	`XactErrMsk` `RW 0x0`	`NyetMsk` `RW 0x0`	`AckMsk` `RW 0x0`	`NakMsk` `RW 0x0`	`StallMsk` `RW 0x0`	`AHBErrMsk` `RW 0x0`	`ChHltdMsk` `RW 0x0`	`XferComplMsk` `RW 0x0`
`HCTSIZ4` `0x590` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DoPng` `RW 0x0`	`Pid` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`HCDMA4` `0x594` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`HCDMAB4` `0x59C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`HCDMAB` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HCDMAB` `RW 0x0`
`HCCHAR5` `0x5A0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ChEna` `RW 0x0`	`ChDis` `RW 0x0`	`OddFrm` `RW 0x0`	`DevAddr` `RW 0x0`							`EC` `RW 0x0`		`EPType` `RW 0x0`		`LSpdDev` `RW 0x0`	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EPDir` `RW 0x0`	`EPNum` `RW 0x0`				`MPS` `RW 0x0`
`HCSPLT5` `0x5A4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SpltEna` `RW 0x0`	`RESERVED` `RO 0x0`														`CompSplt` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XactPos` `RW 0x0`		`HubAddr` `RW 0x0`							`PrtAddr` `RW 0x0`
`HCINT5` `0x5A8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`DESC_LST_ROLLIntr` `RW 0x0`	`XCS_XACT_ERR` `RW 0x0`	`BNAIntr` `RW 0x0`	`DataTglErr` `RW 0x0`	`FrmOvrun` `RW 0x0`	`BblErr` `RW 0x0`	`XactErr` `RW 0x0`	`NYET` `RW 0x0`	`ACK` `RW 0x0`	`NAK` `RW 0x0`	`STALL` `RW 0x0`	`AHBErr` `RW 0x0`	`ChHltd` `RW 0x0`	`XferCompl` `RW 0x0`
`HCINTMSK5` `0x5AC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`FRM_LST_ROLLIntrMsk` `RW 0x0`	`RESERVED1` `RO 0x0`	`BNAIntrMsk` `RW 0x0`	`DataTglErrMsk` `RW 0x0`	`FrmOvrunMsk` `RW 0x0`	`BblErrMsk` `RW 0x0`	`XactErrMsk` `RW 0x0`	`NyetMsk` `RW 0x0`	`AckMsk` `RW 0x0`	`NakMsk` `RW 0x0`	`StallMsk` `RW 0x0`	`AHBErrMsk` `RW 0x0`	`ChHltdMsk` `RW 0x0`	`XferComplMsk` `RW 0x0`
`HCTSIZ5` `0x5B0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DoPng` `RW 0x0`	`Pid` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`HCDMA5` `0x5B4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`HCDMAB5` `0x5BC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`HCDMAB` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HCDMAB` `RW 0x0`
`HCCHAR6` `0x5C0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ChEna` `RW 0x0`	`ChDis` `RW 0x0`	`OddFrm` `RW 0x0`	`DevAddr` `RW 0x0`							`EC` `RW 0x0`		`EPType` `RW 0x0`		`LSpdDev` `RW 0x0`	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EPDir` `RW 0x0`	`EPNum` `RW 0x0`				`MPS` `RW 0x0`
`HCSPLT6` `0x5C4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SpltEna` `RW 0x0`	`RESERVED` `RO 0x0`														`CompSplt` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XactPos` `RW 0x0`		`HubAddr` `RW 0x0`							`PrtAddr` `RW 0x0`
`HCINT6` `0x5C8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`DESC_LST_ROLLIntr` `RW 0x0`	`XCS_XACT_ERR` `RW 0x0`	`BNAIntr` `RW 0x0`	`DataTglErr` `RW 0x0`	`FrmOvrun` `RW 0x0`	`BblErr` `RW 0x0`	`XactErr` `RW 0x0`	`NYET` `RW 0x0`	`ACK` `RW 0x0`	`NAK` `RW 0x0`	`STALL` `RW 0x0`	`AHBErr` `RW 0x0`	`ChHltd` `RW 0x0`	`XferCompl` `RW 0x0`
`HCINTMSK6` `0x5CC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`FRM_LST_ROLLIntrMsk` `RW 0x0`	`RESERVED1` `RO 0x0`	`BNAIntrMsk` `RW 0x0`	`DataTglErrMsk` `RW 0x0`	`FrmOvrunMsk` `RW 0x0`	`BblErrMsk` `RW 0x0`	`XactErrMsk` `RW 0x0`	`NyetMsk` `RW 0x0`	`AckMsk` `RW 0x0`	`NakMsk` `RW 0x0`	`StallMsk` `RW 0x0`	`AHBErrMsk` `RW 0x0`	`ChHltdMsk` `RW 0x0`	`XferComplMsk` `RW 0x0`
`HCTSIZ6` `0x5D0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DoPng` `RW 0x0`	`Pid` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`HCDMA6` `0x5D4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`HCDMAB6` `0x5DC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`HCDMAB` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HCDMAB` `RW 0x0`
`HCCHAR7` `0x5E0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ChEna` `RW 0x0`	`ChDis` `RW 0x0`	`OddFrm` `RW 0x0`	`DevAddr` `RW 0x0`							`EC` `RW 0x0`		`EPType` `RW 0x0`		`LSpdDev` `RW 0x0`	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EPDir` `RW 0x0`	`EPNum` `RW 0x0`				`MPS` `RW 0x0`
`HCSPLT7` `0x5E4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SpltEna` `RW 0x0`	`RESERVED` `RO 0x0`														`CompSplt` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XactPos` `RW 0x0`		`HubAddr` `RW 0x0`							`PrtAddr` `RW 0x0`
`HCINT7` `0x5E8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`DESC_LST_ROLLIntr` `RW 0x0`	`XCS_XACT_ERR` `RW 0x0`	`BNAIntr` `RW 0x0`	`DataTglErr` `RW 0x0`	`FrmOvrun` `RW 0x0`	`BblErr` `RW 0x0`	`XactErr` `RW 0x0`	`NYET` `RW 0x0`	`ACK` `RW 0x0`	`NAK` `RW 0x0`	`STALL` `RW 0x0`	`AHBErr` `RW 0x0`	`ChHltd` `RW 0x0`	`XferCompl` `RW 0x0`
`HCINTMSK7` `0x5EC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`FRM_LST_ROLLIntrMsk` `RW 0x0`	`RESERVED1` `RO 0x0`	`BNAIntrMsk` `RW 0x0`	`DataTglErrMsk` `RW 0x0`	`FrmOvrunMsk` `RW 0x0`	`BblErrMsk` `RW 0x0`	`XactErrMsk` `RW 0x0`	`NyetMsk` `RW 0x0`	`AckMsk` `RW 0x0`	`NakMsk` `RW 0x0`	`StallMsk` `RW 0x0`	`AHBErrMsk` `RW 0x0`	`ChHltdMsk` `RW 0x0`	`XferComplMsk` `RW 0x0`
`HCTSIZ7` `0x5F0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DoPng` `RW 0x0`	`Pid` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`HCDMA7` `0x5F4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`HCDMAB7` `0x5FC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`HCDMAB` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HCDMAB` `RW 0x0`
`HCCHAR8` `0x600` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ChEna` `RW 0x0`	`ChDis` `RW 0x0`	`OddFrm` `RW 0x0`	`DevAddr` `RW 0x0`							`EC` `RW 0x0`		`EPType` `RW 0x0`		`LSpdDev` `RW 0x0`	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EPDir` `RW 0x0`	`EPNum` `RW 0x0`				`MPS` `RW 0x0`
`HCSPLT8` `0x604` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SpltEna` `RW 0x0`	`RESERVED` `RO 0x0`														`CompSplt` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XactPos` `RW 0x0`		`HubAddr` `RW 0x0`							`PrtAddr` `RW 0x0`
`HCINT8` `0x608` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`DESC_LST_ROLLIntr` `RW 0x0`	`XCS_XACT_ERR` `RW 0x0`	`BNAIntr` `RW 0x0`	`DataTglErr` `RW 0x0`	`FrmOvrun` `RW 0x0`	`BblErr` `RW 0x0`	`XactErr` `RW 0x0`	`NYET` `RW 0x0`	`ACK` `RW 0x0`	`NAK` `RW 0x0`	`STALL` `RW 0x0`	`AHBErr` `RW 0x0`	`ChHltd` `RW 0x0`	`XferCompl` `RW 0x0`
`HCINTMSK8` `0x60C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`FRM_LST_ROLLIntrMsk` `RW 0x0`	`RESERVED1` `RO 0x0`	`BNAIntrMsk` `RW 0x0`	`DataTglErrMsk` `RW 0x0`	`FrmOvrunMsk` `RW 0x0`	`BblErrMsk` `RW 0x0`	`XactErrMsk` `RW 0x0`	`NyetMsk` `RW 0x0`	`AckMsk` `RW 0x0`	`NakMsk` `RW 0x0`	`StallMsk` `RW 0x0`	`AHBErrMsk` `RW 0x0`	`ChHltdMsk` `RW 0x0`	`XferComplMsk` `RW 0x0`
`HCTSIZ8` `0x610` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DoPng` `RW 0x0`	`Pid` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`HCDMA8` `0x614` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`HCDMAB8` `0x61C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`HCDMAB` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HCDMAB` `RW 0x0`
`HCCHAR9` `0x620` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ChEna` `RW 0x0`	`ChDis` `RW 0x0`	`OddFrm` `RW 0x0`	`DevAddr` `RW 0x0`							`EC` `RW 0x0`		`EPType` `RW 0x0`		`LSpdDev` `RW 0x0`	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EPDir` `RW 0x0`	`EPNum` `RW 0x0`				`MPS` `RW 0x0`
`HCSPLT9` `0x624` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SpltEna` `RW 0x0`	`RESERVED` `RO 0x0`														`CompSplt` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XactPos` `RW 0x0`		`HubAddr` `RW 0x0`							`PrtAddr` `RW 0x0`
`HCINT9` `0x628` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`DESC_LST_ROLLIntr` `RW 0x0`	`XCS_XACT_ERR` `RW 0x0`	`BNAIntr` `RW 0x0`	`DataTglErr` `RW 0x0`	`FrmOvrun` `RW 0x0`	`BblErr` `RW 0x0`	`XactErr` `RW 0x0`	`NYET` `RW 0x0`	`ACK` `RW 0x0`	`NAK` `RW 0x0`	`STALL` `RW 0x0`	`AHBErr` `RW 0x0`	`ChHltd` `RW 0x0`	`XferCompl` `RW 0x0`
`HCINTMSK9` `0x62C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`FRM_LST_ROLLIntrMsk` `RW 0x0`	`RESERVED1` `RO 0x0`	`BNAIntrMsk` `RW 0x0`	`DataTglErrMsk` `RW 0x0`	`FrmOvrunMsk` `RW 0x0`	`BblErrMsk` `RW 0x0`	`XactErrMsk` `RW 0x0`	`NyetMsk` `RW 0x0`	`AckMsk` `RW 0x0`	`NakMsk` `RW 0x0`	`StallMsk` `RW 0x0`	`AHBErrMsk` `RW 0x0`	`ChHltdMsk` `RW 0x0`	`XferComplMsk` `RW 0x0`
`HCTSIZ9` `0x630` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DoPng` `RW 0x0`	`Pid` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`HCDMA9` `0x634` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`HCDMAB9` `0x63C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`HCDMAB` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HCDMAB` `RW 0x0`
`HCCHAR10` `0x640` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ChEna` `RW 0x0`	`ChDis` `RW 0x0`	`OddFrm` `RW 0x0`	`DevAddr` `RW 0x0`							`EC` `RW 0x0`		`EPType` `RW 0x0`		`LSpdDev` `RW 0x0`	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EPDir` `RW 0x0`	`EPNum` `RW 0x0`				`MPS` `RW 0x0`
`HCSPLT10` `0x644` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SpltEna` `RW 0x0`	`RESERVED` `RO 0x0`														`CompSplt` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XactPos` `RW 0x0`		`HubAddr` `RW 0x0`							`PrtAddr` `RW 0x0`
`HCINT10` `0x648` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`DESC_LST_ROLLIntr` `RW 0x0`	`XCS_XACT_ERR` `RW 0x0`	`BNAIntr` `RW 0x0`	`DataTglErr` `RW 0x0`	`FrmOvrun` `RW 0x0`	`BblErr` `RW 0x0`	`XactErr` `RW 0x0`	`NYET` `RW 0x0`	`ACK` `RW 0x0`	`NAK` `RW 0x0`	`STALL` `RW 0x0`	`AHBErr` `RW 0x0`	`ChHltd` `RW 0x0`	`XferCompl` `RW 0x0`
`HCINTMSK10` `0x64C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`FRM_LST_ROLLIntrMsk` `RW 0x0`	`RESERVED1` `RO 0x0`	`BNAIntrMsk` `RW 0x0`	`DataTglErrMsk` `RW 0x0`	`FrmOvrunMsk` `RW 0x0`	`BblErrMsk` `RW 0x0`	`XactErrMsk` `RW 0x0`	`NyetMsk` `RW 0x0`	`AckMsk` `RW 0x0`	`NakMsk` `RW 0x0`	`StallMsk` `RW 0x0`	`AHBErrMsk` `RW 0x0`	`ChHltdMsk` `RW 0x0`	`XferComplMsk` `RW 0x0`
`HCTSIZ10` `0x650` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DoPng` `RW 0x0`	`Pid` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`HCDMA10` `0x654` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`HCDMAB10` `0x65C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`HCDMAB` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HCDMAB` `RW 0x0`
`HCCHAR11` `0x660` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ChEna` `RW 0x0`	`ChDis` `RW 0x0`	`OddFrm` `RW 0x0`	`DevAddr` `RW 0x0`							`EC` `RW 0x0`		`EPType` `RW 0x0`		`LSpdDev` `RW 0x0`	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EPDir` `RW 0x0`	`EPNum` `RW 0x0`				`MPS` `RW 0x0`
`HCSPLT11` `0x664` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SpltEna` `RW 0x0`	`RESERVED` `RO 0x0`														`CompSplt` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XactPos` `RW 0x0`		`HubAddr` `RW 0x0`							`PrtAddr` `RW 0x0`
`HCINT11` `0x668` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`DESC_LST_ROLLIntr` `RW 0x0`	`XCS_XACT_ERR` `RW 0x0`	`BNAIntr` `RW 0x0`	`DataTglErr` `RW 0x0`	`FrmOvrun` `RW 0x0`	`BblErr` `RW 0x0`	`XactErr` `RW 0x0`	`NYET` `RW 0x0`	`ACK` `RW 0x0`	`NAK` `RW 0x0`	`STALL` `RW 0x0`	`AHBErr` `RW 0x0`	`ChHltd` `RW 0x0`	`XferCompl` `RW 0x0`
`HCINTMSK11` `0x66C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`FRM_LST_ROLLIntrMsk` `RW 0x0`	`RESERVED1` `RO 0x0`	`BNAIntrMsk` `RW 0x0`	`DataTglErrMsk` `RW 0x0`	`FrmOvrunMsk` `RW 0x0`	`BblErrMsk` `RW 0x0`	`XactErrMsk` `RW 0x0`	`NyetMsk` `RW 0x0`	`AckMsk` `RW 0x0`	`NakMsk` `RW 0x0`	`StallMsk` `RW 0x0`	`AHBErrMsk` `RW 0x0`	`ChHltdMsk` `RW 0x0`	`XferComplMsk` `RW 0x0`
`HCTSIZ11` `0x670` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DoPng` `RW 0x0`	`Pid` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`HCDMA11` `0x674` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`HCDMAB11` `0x67C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`HCDMAB` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HCDMAB` `RW 0x0`
`HCCHAR12` `0x680` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ChEna` `RW 0x0`	`ChDis` `RW 0x0`	`OddFrm` `RW 0x0`	`DevAddr` `RW 0x0`							`EC` `RW 0x0`		`EPType` `RW 0x0`		`LSpdDev` `RW 0x0`	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EPDir` `RW 0x0`	`EPNum` `RW 0x0`				`MPS` `RW 0x0`
`HCSPLT12` `0x684` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SpltEna` `RW 0x0`	`RESERVED` `RO 0x0`														`CompSplt` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XactPos` `RW 0x0`		`HubAddr` `RW 0x0`							`PrtAddr` `RW 0x0`
`HCINT12` `0x688` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`DESC_LST_ROLLIntr` `RW 0x0`	`XCS_XACT_ERR` `RW 0x0`	`BNAIntr` `RW 0x0`	`DataTglErr` `RW 0x0`	`FrmOvrun` `RW 0x0`	`BblErr` `RW 0x0`	`XactErr` `RW 0x0`	`NYET` `RW 0x0`	`ACK` `RW 0x0`	`NAK` `RW 0x0`	`STALL` `RW 0x0`	`AHBErr` `RW 0x0`	`ChHltd` `RW 0x0`	`XferCompl` `RW 0x0`
`HCINTMSK12` `0x68C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`FRM_LST_ROLLIntrMsk` `RW 0x0`	`RESERVED1` `RO 0x0`	`BNAIntrMsk` `RW 0x0`	`DataTglErrMsk` `RW 0x0`	`FrmOvrunMsk` `RW 0x0`	`BblErrMsk` `RW 0x0`	`XactErrMsk` `RW 0x0`	`NyetMsk` `RW 0x0`	`AckMsk` `RW 0x0`	`NakMsk` `RW 0x0`	`StallMsk` `RW 0x0`	`AHBErrMsk` `RW 0x0`	`ChHltdMsk` `RW 0x0`	`XferComplMsk` `RW 0x0`
`HCTSIZ12` `0x690` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DoPng` `RW 0x0`	`Pid` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`HCDMA12` `0x694` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`HCDMAB12` `0x69C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`HCDMAB` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HCDMAB` `RW 0x0`
`HCCHAR13` `0x6A0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ChEna` `RW 0x0`	`ChDis` `RW 0x0`	`OddFrm` `RW 0x0`	`DevAddr` `RW 0x0`							`EC` `RW 0x0`		`EPType` `RW 0x0`		`LSpdDev` `RW 0x0`	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EPDir` `RW 0x0`	`EPNum` `RW 0x0`				`MPS` `RW 0x0`
`HCSPLT13` `0x6A4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SpltEna` `RW 0x0`	`RESERVED` `RO 0x0`														`CompSplt` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XactPos` `RW 0x0`		`HubAddr` `RW 0x0`							`PrtAddr` `RW 0x0`
`HCINT13` `0x6A8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`DESC_LST_ROLLIntr` `RW 0x0`	`XCS_XACT_ERR` `RW 0x0`	`BNAIntr` `RW 0x0`	`DataTglErr` `RW 0x0`	`FrmOvrun` `RW 0x0`	`BblErr` `RW 0x0`	`XactErr` `RW 0x0`	`NYET` `RW 0x0`	`ACK` `RW 0x0`	`NAK` `RW 0x0`	`STALL` `RW 0x0`	`AHBErr` `RW 0x0`	`ChHltd` `RW 0x0`	`XferCompl` `RW 0x0`
`HCINTMSK13` `0x6AC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`FRM_LST_ROLLIntrMsk` `RW 0x0`	`RESERVED1` `RO 0x0`	`BNAIntrMsk` `RW 0x0`	`DataTglErrMsk` `RW 0x0`	`FrmOvrunMsk` `RW 0x0`	`BblErrMsk` `RW 0x0`	`XactErrMsk` `RW 0x0`	`NyetMsk` `RW 0x0`	`AckMsk` `RW 0x0`	`NakMsk` `RW 0x0`	`StallMsk` `RW 0x0`	`AHBErrMsk` `RW 0x0`	`ChHltdMsk` `RW 0x0`	`XferComplMsk` `RW 0x0`
`HCTSIZ13` `0x6B0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DoPng` `RW 0x0`	`Pid` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`HCDMA13` `0x6B4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`HCDMAB13` `0x6BC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`HCDMAB` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HCDMAB` `RW 0x0`
`HCCHAR14` `0x6C0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ChEna` `RW 0x0`	`ChDis` `RW 0x0`	`OddFrm` `RW 0x0`	`DevAddr` `RW 0x0`							`EC` `RW 0x0`		`EPType` `RW 0x0`		`LSpdDev` `RW 0x0`	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EPDir` `RW 0x0`	`EPNum` `RW 0x0`				`MPS` `RW 0x0`
`HCSPLT14` `0x6C4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SpltEna` `RW 0x0`	`RESERVED` `RO 0x0`														`CompSplt` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XactPos` `RW 0x0`		`HubAddr` `RW 0x0`							`PrtAddr` `RW 0x0`
`HCINT14` `0x6C8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`DESC_LST_ROLLIntr` `RW 0x0`	`XCS_XACT_ERR` `RW 0x0`	`BNAIntr` `RW 0x0`	`DataTglErr` `RW 0x0`	`FrmOvrun` `RW 0x0`	`BblErr` `RW 0x0`	`XactErr` `RW 0x0`	`NYET` `RW 0x0`	`ACK` `RW 0x0`	`NAK` `RW 0x0`	`STALL` `RW 0x0`	`AHBErr` `RW 0x0`	`ChHltd` `RW 0x0`	`XferCompl` `RW 0x0`
`HCINTMSK14` `0x6CC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`FRM_LST_ROLLIntrMsk` `RW 0x0`	`RESERVED1` `RO 0x0`	`BNAIntrMsk` `RW 0x0`	`DataTglErrMsk` `RW 0x0`	`FrmOvrunMsk` `RW 0x0`	`BblErrMsk` `RW 0x0`	`XactErrMsk` `RW 0x0`	`NyetMsk` `RW 0x0`	`AckMsk` `RW 0x0`	`NakMsk` `RW 0x0`	`StallMsk` `RW 0x0`	`AHBErrMsk` `RW 0x0`	`ChHltdMsk` `RW 0x0`	`XferComplMsk` `RW 0x0`
`HCTSIZ14` `0x6D0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DoPng` `RW 0x0`	`Pid` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`HCDMA14` `0x6D4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`HCDMAB14` `0x6DC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`HCDMAB` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HCDMAB` `RW 0x0`
`HCCHAR15` `0x6E0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ChEna` `RW 0x0`	`ChDis` `RW 0x0`	`OddFrm` `RW 0x0`	`DevAddr` `RW 0x0`							`EC` `RW 0x0`		`EPType` `RW 0x0`		`LSpdDev` `RW 0x0`	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EPDir` `RW 0x0`	`EPNum` `RW 0x0`				`MPS` `RW 0x0`
`HCSPLT15` `0x6E4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SpltEna` `RW 0x0`	`RESERVED` `RO 0x0`														`CompSplt` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XactPos` `RW 0x0`		`HubAddr` `RW 0x0`							`PrtAddr` `RW 0x0`
`HCINT15` `0x6E8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`DESC_LST_ROLLIntr` `RW 0x0`	`XCS_XACT_ERR` `RW 0x0`	`BNAIntr` `RW 0x0`	`DataTglErr` `RW 0x0`	`FrmOvrun` `RW 0x0`	`BblErr` `RW 0x0`	`XactErr` `RW 0x0`	`NYET` `RW 0x0`	`ACK` `RW 0x0`	`NAK` `RW 0x0`	`STALL` `RW 0x0`	`AHBErr` `RW 0x0`	`ChHltd` `RW 0x0`	`XferCompl` `RW 0x0`
`HCINTMSK15` `0x6EC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`FRM_LST_ROLLIntrMsk` `RW 0x0`	`RESERVED1` `RO 0x0`	`BNAIntrMsk` `RW 0x0`	`DataTglErrMsk` `RW 0x0`	`FrmOvrunMsk` `RW 0x0`	`BblErrMsk` `RW 0x0`	`XactErrMsk` `RW 0x0`	`NyetMsk` `RW 0x0`	`AckMsk` `RW 0x0`	`NakMsk` `RW 0x0`	`StallMsk` `RW 0x0`	`AHBErrMsk` `RW 0x0`	`ChHltdMsk` `RW 0x0`	`XferComplMsk` `RW 0x0`
`HCTSIZ15` `0x6F0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DoPng` `RW 0x0`	`Pid` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`HCDMA15` `0x6F4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`HCDMAB15` `0x6FC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`HCDMAB` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HCDMAB` `RW 0x0`
`DCFG` `0x800` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ResValid` `RW 0x2`						`PerSchIntvl` `RW 0x0`		`DescDMA` `RW 0x0`	`Reserved`					`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ErraticIntMsk` `RW 0x0`	`XCVRDLY` `RW 0x0`	`EnDevOutNak` `RW 0x0`	`PerFrInt` `RW 0x0`		`DevAddr` `RW 0x0`							`Ena32KHzSusp` `RW 0x0`	`NZStsOUTHShk` `RW 0x0`	`DevSpd` `RW 0x0`
`DCTL` `0x804` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`													`Reserved`	`EnContOnBNA` `RW 0x0`	`NakOnBble` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`IgnrFrmNum` `RW 0x0`	`GMC` `RW 0x0`		`Reserved`	`PWROnPrgDone` `RW 0x0`	`CGOUTNak` `WO 0x0`	`SGOUTNak` `WO 0x0`	`CGNPInNak` `WO 0x0`	`SGNPInNak` `WO 0x0`	`TstCtl` `RW 0x0`			`GOUTNakSts` `RO 0x0`	`GNPINNakSts` `RO 0x0`	`SftDiscon` `RW 0x1`	`RmtWkUpSig` `RW 0x0`
`DSTS` `0x808` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`								`DevLnSts` `RO 0x0`		`SOFFN` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`SOFFN` `RO 0x0`								`RESERVED1` `RO 0x0`				`ErrticErr` `RO 0x0`	`EnumSpd` `RO 0x1`		`SuspSts` `RO 0x0`
`DIEPMSK` `0x810` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`NAKMsk` `RW 0x0`	`Reserved`			`BNAInIntrMsk` `RW 0x0`	`TxfifoUndrnMsk` `RW 0x0`	`RESERVED1` `RO 0x0`	`INEPNakEffMsk` `RW 0x0`	`INTknEPMisMsk` `RW 0x0`	`INTknTXFEmpMsk` `RW 0x0`	`TimeOUTMsk` `RW 0x0`	`AHBErrMsk` `RW 0x0`	`EPDisbldMsk` `RW 0x0`	`XferComplMsk` `RW 0x0`
`DOEPMSK` `0x814` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`	`NYETMsk` `RW 0x0`	`NAKMsk` `RW 0x0`	`BbleErrMsk` `RW 0x0`	`Reserved`		`BnaOutIntrMsk` `RW 0x0`	`OutPktErrMsk` `RW 0x0`	`RESERVED1` `RO 0x0`	`Back2BackSETup` `RW 0x0`	`StsPhseRcvdMsk` `RW 0x0`	`OUTTknEPdisMsk` `RW 0x0`	`SetUPMsk` `RW 0x0`	`AHBErrMsk` `RW 0x0`	`EPDisbldMsk` `RW 0x0`	`XferComplMsk` `RW 0x0`
`DAINT` `0x818` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`OutEPInt15` `RO 0x0`	`OutEPInt14` `RO 0x0`	`OutEPInt13` `RO 0x0`	`OutEPInt12` `RO 0x0`	`OutEPInt11` `RO 0x0`	`OutEPInt10` `RO 0x0`	`OutEPInt9` `RO 0x0`	`OutEPInt8` `RO 0x0`	`OutEPInt7` `RO 0x0`	`OutEPInt6` `RO 0x0`	`OutEPInt5` `RO 0x0`	`OutEPInt4` `RO 0x0`	`OutEPInt3` `RO 0x0`	`OutEPInt2` `RO 0x0`	`OutEPInt1` `RO 0x0`	`OutEPInt0` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`InEpInt15` `RO 0x0`	`InEpInt14` `RO 0x0`	`InEpInt13` `RO 0x0`	`InEpInt12` `RO 0x0`	`InEpInt11` `RO 0x0`	`InEpInt10` `RO 0x0`	`InEpInt9` `RO 0x0`	`InEpInt8` `RO 0x0`	`InEpInt7` `RO 0x0`	`InEpInt6` `RO 0x0`	`InEpInt5` `RO 0x0`	`InEpInt4` `RO 0x0`	`InEpInt3` `RO 0x0`	`InEpInt2` `RO 0x0`	`InEpInt1` `RO 0x0`	`InEpInt0` `RO 0x0`
`DAINTMSK` `0x81C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`OutEPMsk15` `RW 0x0`	`OutEPMsk14` `RW 0x0`	`OutEPMsk13` `RW 0x0`	`OutEPMsk12` `RW 0x0`	`OutEPMsk11` `RW 0x0`	`OutEPMsk10` `RW 0x0`	`OutEPMsk9` `RW 0x0`	`OutEPMsk8` `RW 0x0`	`OutEPMsk7` `RW 0x0`	`OutEPMsk6` `RW 0x0`	`OutEPMsk5` `RW 0x0`	`OutEPMsk4` `RW 0x0`	`OutEPMsk3` `RW 0x0`	`OutEPMsk2` `RW 0x0`	`OutEPMsk1` `RW 0x0`	`OutEPMsk0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`InEpMsk15` `RW 0x0`	`InEpMsk14` `RW 0x0`	`InEpMsk13` `RW 0x0`	`InEpMsk12` `RW 0x0`	`InEpMsk11` `RW 0x0`	`InEpMsk10` `RW 0x0`	`InEpMsk9` `RW 0x0`	`InEpMsk8` `RW 0x0`	`InEpMsk7` `RW 0x0`	`InEpMsk6` `RW 0x0`	`InEpMsk5` `RW 0x0`	`InEpMsk4` `RW 0x0`	`InEpMsk3` `RW 0x0`	`InEpMsk2` `RW 0x0`	`InEpMsk1` `RW 0x0`	`InEpMsk0` `RW 0x0`
`DVBUSDIS` `0x828` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DVBUSDis` `RW 0x17D7`
`DVBUSPULSE` `0x82C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`				`DVBUSPulse` `RW 0x5B8`
`DTHRCTL` `0x830` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`				`ArbPrkEn` `RW 0x1`	`RESERVED1` `RO 0x1`	`RxThrLen` `RW 0x8`									`RxThrEn` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED2` `RO 0x0`			`AHBThrRatio` `RW 0x0`		`TxThrLen` `RW 0x8`									`ISOThrEn` `RW 0x0`	`NonISOThrEn` `RW 0x0`
`DIEPEMPMSK` `0x834` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`InEpTxfEmpMsk` `RW 0x0`
`DIEPCTL0` `0x900` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`RESERVED` `RO 0x0`		`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`TxFNum` `RW 0x0`				`Stall` `RW 0x0`	`RESERVED1` `RO 0x0`	`EPType` `RO 0x0`		`NAKSts` `RO 0x0`	`RESERVED2` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RO 0x1`	`Reserved`				`RESERVED3` `RO 0x0`									`MPS` `RW 0x0`
`DIEPINT0` `0x908` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`TxfifoUndrn` `RW 0x0`	`TxFEmp` `RO 0x1`	`INEPNakEff` `RW 0x0`	`INTknEPMis` `RW 0x0`	`INTknTXFEmp` `RW 0x0`	`TimeOUT` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DIEPTSIZ0` `0x910` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`											`PktCnt` `RW 0x0`		`RESERVED1` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED1` `RO 0x0`									`XferSize` `RW 0x0`
`DIEPDMA0` `0x914` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DTXFSTS0` `0x918` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPTxFSpcAvail` `RO 0x0`
`DIEPDMAB0` `0x91C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DIEPCTL1` `0x920` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`TxFNum` `RW 0x0`				`Stall` `RW 0x0`	`Reserved`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DIEPINT1` `0x928` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`TxfifoUndrn` `RW 0x0`	`TxFEmp` `RO 0x1`	`INEPNakEff` `RW 0x0`	`INTknEPMis` `RW 0x0`	`INTknTXFEmp` `RW 0x0`	`TimeOUT` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DIEPTSIZ1` `0x930` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`MC` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DIEPDMA1` `0x934` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DTXFSTS1` `0x938` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPTxFSpcAvail` `RO 0x0`
`DIEPDMAB1` `0x93C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DIEPCTL2` `0x940` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`TxFNum` `RW 0x0`				`Stall` `RW 0x0`	`Reserved`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DIEPINT2` `0x948` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`TxfifoUndrn` `RW 0x0`	`TxFEmp` `RO 0x1`	`INEPNakEff` `RW 0x0`	`INTknEPMis` `RW 0x0`	`INTknTXFEmp` `RW 0x0`	`TimeOUT` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DIEPTSIZ2` `0x950` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`MC` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DIEPDMA2` `0x954` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DTXFSTS2` `0x958` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPTxFSpcAvail` `RO 0x0`
`DIEPDMAB2` `0x95C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DIEPCTL3` `0x960` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`TxFNum` `RW 0x0`				`Stall` `RW 0x0`	`Reserved`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DIEPINT3` `0x968` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`TxfifoUndrn` `RW 0x0`	`TxFEmp` `RO 0x1`	`INEPNakEff` `RW 0x0`	`INTknEPMis` `RW 0x0`	`INTknTXFEmp` `RW 0x0`	`TimeOUT` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DIEPTSIZ3` `0x970` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`MC` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DIEPDMA3` `0x974` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DTXFSTS3` `0x978` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPTxFSpcAvail` `RO 0x0`
`DIEPDMAB3` `0x97C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DIEPCTL4` `0x980` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`TxFNum` `RW 0x0`				`Stall` `RW 0x0`	`Reserved`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DIEPINT4` `0x988` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`TxfifoUndrn` `RW 0x0`	`TxFEmp` `RO 0x1`	`INEPNakEff` `RW 0x0`	`INTknEPMis` `RW 0x0`	`INTknTXFEmp` `RW 0x0`	`TimeOUT` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DIEPTSIZ4` `0x990` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`MC` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DIEPDMA4` `0x994` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DTXFSTS4` `0x998` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPTxFSpcAvail` `RO 0x0`
`DIEPDMAB4` `0x99C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DIEPCTL5` `0x9A0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`TxFNum` `RW 0x0`				`Stall` `RW 0x0`	`Reserved`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DIEPINT5` `0x9A8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`TxfifoUndrn` `RW 0x0`	`TxFEmp` `RO 0x1`	`INEPNakEff` `RW 0x0`	`INTknEPMis` `RW 0x0`	`INTknTXFEmp` `RW 0x0`	`TimeOUT` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DIEPTSIZ5` `0x9B0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`MC` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DIEPDMA5` `0x9B4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DTXFSTS5` `0x9B8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPTxFSpcAvail` `RO 0x0`
`DIEPDMAB5` `0x9BC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DIEPCTL6` `0x9C0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`TxFNum` `RW 0x0`				`Stall` `RW 0x0`	`Reserved`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DIEPINT6` `0x9C8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`TxfifoUndrn` `RW 0x0`	`TxFEmp` `RO 0x1`	`INEPNakEff` `RW 0x0`	`INTknEPMis` `RW 0x0`	`INTknTXFEmp` `RW 0x0`	`TimeOUT` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DIEPTSIZ6` `0x9D0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`MC` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DIEPDMA6` `0x9D4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DTXFSTS6` `0x9D8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPTxFSpcAvail` `RO 0x0`
`DIEPDMAB6` `0x9DC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DIEPCTL7` `0x9E0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`TxFNum` `RW 0x0`				`Stall` `RW 0x0`	`Reserved`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DIEPINT7` `0x9E8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`TxfifoUndrn` `RW 0x0`	`TxFEmp` `RO 0x1`	`INEPNakEff` `RW 0x0`	`INTknEPMis` `RW 0x0`	`INTknTXFEmp` `RW 0x0`	`TimeOUT` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DIEPTSIZ7` `0x9F0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`MC` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DIEPDMA7` `0x9F4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DTXFSTS7` `0x9F8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPTxFSpcAvail` `RO 0x0`
`DIEPDMAB7` `0x9FC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DIEPCTL8` `0xA00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`TxFNum` `RW 0x0`				`Stall` `RW 0x0`	`Reserved`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DIEPINT8` `0xA08` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`TxfifoUndrn` `RW 0x0`	`TxFEmp` `RO 0x1`	`INEPNakEff` `RW 0x0`	`INTknEPMis` `RW 0x0`	`INTknTXFEmp` `RW 0x0`	`TimeOUT` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DIEPTSIZ8` `0xA10` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`MC` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DIEPDMA8` `0xA14` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DTXFSTS8` `0xA18` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPTxFSpcAvail` `RO 0x0`
`DIEPDMAB8` `0xA1C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DIEPCTL9` `0xA20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`TxFNum` `RW 0x0`				`Stall` `RW 0x0`	`Reserved`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DIEPINT9` `0xA28` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`TxfifoUndrn` `RW 0x0`	`TxFEmp` `RO 0x1`	`INEPNakEff` `RW 0x0`	`INTknEPMis` `RW 0x0`	`INTknTXFEmp` `RW 0x0`	`TimeOUT` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DIEPTSIZ9` `0xA30` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`MC` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DIEPDMA9` `0xA34` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DTXFSTS9` `0xA38` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPTxFSpcAvail` `RO 0x0`
`DIEPDMAB9` `0xA3C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DIEPCTL10` `0xA40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`TxFNum` `RW 0x0`				`Stall` `RW 0x0`	`Reserved`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DIEPINT10` `0xA48` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`TxfifoUndrn` `RW 0x0`	`TxFEmp` `RO 0x1`	`INEPNakEff` `RW 0x0`	`INTknEPMis` `RW 0x0`	`INTknTXFEmp` `RW 0x0`	`TimeOUT` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DIEPTSIZ10` `0xA50` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`MC` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DIEPDMA10` `0xA54` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DTXFSTS10` `0xA58` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPTxFSpcAvail` `RO 0x0`
`DIEPDMAB10` `0xA5C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DIEPCTL11` `0xA60` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`TxFNum` `RW 0x0`				`Stall` `RW 0x0`	`Reserved`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DIEPINT11` `0xA68` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`TxfifoUndrn` `RW 0x0`	`TxFEmp` `RO 0x1`	`INEPNakEff` `RW 0x0`	`INTknEPMis` `RW 0x0`	`INTknTXFEmp` `RW 0x0`	`TimeOUT` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DIEPTSIZ11` `0xA70` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`MC` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DIEPDMA11` `0xA74` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DTXFSTS11` `0xA78` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPTxFSpcAvail` `RO 0x0`
`DIEPDMAB11` `0xA7C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DIEPCTL12` `0xA80` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`TxFNum` `RW 0x0`				`Stall` `RW 0x0`	`Reserved`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DIEPINT12` `0xA88` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`TxfifoUndrn` `RW 0x0`	`TxFEmp` `RO 0x1`	`INEPNakEff` `RW 0x0`	`INTknEPMis` `RW 0x0`	`INTknTXFEmp` `RW 0x0`	`TimeOUT` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DIEPTSIZ12` `0xA90` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`MC` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DIEPDMA12` `0xA94` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DTXFSTS12` `0xA98` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPTxFSpcAvail` `RO 0x0`
`DIEPDMAB12` `0xA9C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DIEPCTL13` `0xAA0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`TxFNum` `RW 0x0`				`Stall` `RW 0x0`	`Reserved`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DIEPINT13` `0xAA8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`TxfifoUndrn` `RW 0x0`	`TxFEmp` `RO 0x1`	`INEPNakEff` `RW 0x0`	`INTknEPMis` `RW 0x0`	`INTknTXFEmp` `RW 0x0`	`TimeOUT` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DIEPTSIZ13` `0xAB0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`MC` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DIEPDMA13` `0xAB4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DTXFSTS13` `0xAB8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPTxFSpcAvail` `RO 0x0`
`DIEPDMAB13` `0xABC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DIEPCTL14` `0xAC0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`TxFNum` `RW 0x0`				`Stall` `RW 0x0`	`Reserved`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DIEPINT14` `0xAC8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`TxfifoUndrn` `RW 0x0`	`TxFEmp` `RO 0x1`	`INEPNakEff` `RW 0x0`	`INTknEPMis` `RW 0x0`	`INTknTXFEmp` `RW 0x0`	`TimeOUT` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DIEPTSIZ14` `0xAD0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`MC` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DIEPDMA14` `0xAD4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DTXFSTS14` `0xAD8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPTxFSpcAvail` `RO 0x0`
`DIEPDMAB14` `0xADC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DIEPCTL15` `0xAE0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`TxFNum` `RW 0x0`				`Stall` `RW 0x0`	`Reserved`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DIEPINT15` `0xAE8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`TxfifoUndrn` `RW 0x0`	`TxFEmp` `RO 0x1`	`INEPNakEff` `RW 0x0`	`INTknEPMis` `RW 0x0`	`INTknTXFEmp` `RW 0x0`	`TimeOUT` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DIEPTSIZ15` `0xAF0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`MC` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DIEPDMA15` `0xAF4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DTXFSTS15` `0xAF8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPTxFSpcAvail` `RO 0x0`
`DIEPDMAB15` `0xAFC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DOEPCTL0` `0xB00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RO 0x0`	`RESERVED` `RO 0x0`		`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`RESERVED1` `RO 0x0`				`Stall` `RW 0x0`	`Snp` `RW 0x0`	`EPType` `RO 0x0`		`NAKSts` `RO 0x0`	`RESERVED2` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RO 0x1`	`RESERVED3` `RO 0x0`													`MPS` `RO 0x0`
`DOEPINT0` `0xB08` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`StupPktRcvd` `RW 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`OutPktErr` `RW 0x0`	`Reserved`	`Back2BackSETup` `RW 0x0`	`StsPhseRcvd` `RW 0x0`	`OUTTknEPdis` `RW 0x0`	`SetUp` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DOEPTSIZ0` `0xB10` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`SUPCnt` `RW 0x0`		`RESERVED1` `RO 0x0`									`PktCnt` `RW 0x0`	`RESERVED2` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED2` `RO 0x0`									`XferSize` `RW 0x0`
`DOEPDMA0` `0xB14` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DOEPDMAB0` `0xB1C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DOEPCTL1` `0xB20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`Reserved`				`Stall` `RW 0x0`	`Snp` `RW 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DOEPINT1` `0xB28` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`StupPktRcvd` `RW 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`OutPktErr` `RW 0x0`	`Reserved`	`Back2BackSETup` `RW 0x0`	`StsPhseRcvd` `RW 0x0`	`OUTTknEPdis` `RW 0x0`	`SetUp` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DOEPTSIZ1` `0xB30` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`RxDPID` `RO 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DOEPDMA1` `0xB34` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DOEPDMAB1` `0xB3C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DOEPCTL2` `0xB40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`Reserved`				`Stall` `RW 0x0`	`Snp` `RW 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DOEPINT2` `0xB48` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`StupPktRcvd` `RW 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`OutPktErr` `RW 0x0`	`Reserved`	`Back2BackSETup` `RW 0x0`	`StsPhseRcvd` `RW 0x0`	`OUTTknEPdis` `RW 0x0`	`SetUp` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DOEPTSIZ2` `0xB50` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`RxDPID` `RO 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DOEPDMA2` `0xB54` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DOEPDMAB2` `0xB5C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DOEPCTL3` `0xB60` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`Reserved`				`Stall` `RW 0x0`	`Snp` `RW 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DOEPINT3` `0xB68` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`StupPktRcvd` `RW 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`OutPktErr` `RW 0x0`	`Reserved`	`Back2BackSETup` `RW 0x0`	`StsPhseRcvd` `RW 0x0`	`OUTTknEPdis` `RW 0x0`	`SetUp` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DOEPTSIZ3` `0xB70` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`RxDPID` `RO 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DOEPDMA3` `0xB74` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DOEPDMAB3` `0xB7C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DOEPCTL4` `0xB80` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`Reserved`				`Stall` `RW 0x0`	`Snp` `RW 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DOEPINT4` `0xB88` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`StupPktRcvd` `RW 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`OutPktErr` `RW 0x0`	`Reserved`	`Back2BackSETup` `RW 0x0`	`StsPhseRcvd` `RW 0x0`	`OUTTknEPdis` `RW 0x0`	`SetUp` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DOEPTSIZ4` `0xB90` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`RxDPID` `RO 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DOEPDMA4` `0xB94` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DOEPDMAB4` `0xB9C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DOEPCTL5` `0xBA0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`Reserved`				`Stall` `RW 0x0`	`Snp` `RW 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DOEPINT5` `0xBA8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`StupPktRcvd` `RW 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`OutPktErr` `RW 0x0`	`Reserved`	`Back2BackSETup` `RW 0x0`	`StsPhseRcvd` `RW 0x0`	`OUTTknEPdis` `RW 0x0`	`SetUp` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DOEPTSIZ5` `0xBB0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`RxDPID` `RO 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DOEPDMA5` `0xBB4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DOEPDMAB5` `0xBBC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DOEPCTL6` `0xBC0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`Reserved`				`Stall` `RW 0x0`	`Snp` `RW 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DOEPINT6` `0xBC8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`StupPktRcvd` `RW 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`OutPktErr` `RW 0x0`	`Reserved`	`Back2BackSETup` `RW 0x0`	`StsPhseRcvd` `RW 0x0`	`OUTTknEPdis` `RW 0x0`	`SetUp` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DOEPTSIZ6` `0xBD0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`RxDPID` `RO 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DOEPDMA6` `0xBD4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DOEPDMAB6` `0xBDC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DOEPCTL7` `0xBE0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`Reserved`				`Stall` `RW 0x0`	`Snp` `RW 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DOEPINT7` `0xBE8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`StupPktRcvd` `RW 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`OutPktErr` `RW 0x0`	`Reserved`	`Back2BackSETup` `RW 0x0`	`StsPhseRcvd` `RW 0x0`	`OUTTknEPdis` `RW 0x0`	`SetUp` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DOEPTSIZ7` `0xBF0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`RxDPID` `RO 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DOEPDMA7` `0xBF4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DOEPDMAB7` `0xBFC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DOEPCTL8` `0xC00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`Reserved`				`Stall` `RW 0x0`	`Snp` `RW 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DOEPINT8` `0xC08` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`StupPktRcvd` `RW 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`OutPktErr` `RW 0x0`	`Reserved`	`Back2BackSETup` `RW 0x0`	`StsPhseRcvd` `RW 0x0`	`OUTTknEPdis` `RW 0x0`	`SetUp` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DOEPTSIZ8` `0xC10` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`RxDPID` `RO 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DOEPDMA8` `0xC14` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DOEPDMAB8` `0xC1C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DOEPCTL9` `0xC20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`Reserved`				`Stall` `RW 0x0`	`Snp` `RW 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DOEPINT9` `0xC28` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`StupPktRcvd` `RW 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`OutPktErr` `RW 0x0`	`Reserved`	`Back2BackSETup` `RW 0x0`	`StsPhseRcvd` `RW 0x0`	`OUTTknEPdis` `RW 0x0`	`SetUp` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DOEPTSIZ9` `0xC30` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`RxDPID` `RO 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DOEPDMA9` `0xC34` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DOEPDMAB9` `0xC3C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DOEPCTL10` `0xC40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`Reserved`				`Stall` `RW 0x0`	`Snp` `RW 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DOEPINT10` `0xC48` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`StupPktRcvd` `RW 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`OutPktErr` `RW 0x0`	`Reserved`	`Back2BackSETup` `RW 0x0`	`StsPhseRcvd` `RW 0x0`	`OUTTknEPdis` `RW 0x0`	`SetUp` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DOEPTSIZ10` `0xC50` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`RxDPID` `RO 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DOEPDMA10` `0xC54` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DOEPDMAB10` `0xC5C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DOEPCTL11` `0xC60` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`Reserved`				`Stall` `RW 0x0`	`Snp` `RW 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DOEPINT11` `0xC68` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`StupPktRcvd` `RW 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`OutPktErr` `RW 0x0`	`Reserved`	`Back2BackSETup` `RW 0x0`	`StsPhseRcvd` `RW 0x0`	`OUTTknEPdis` `RW 0x0`	`SetUp` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DOEPTSIZ11` `0xC70` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`RxDPID` `RO 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DOEPDMA11` `0xC74` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DOEPDMAB11` `0xC7C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DOEPCTL12` `0xC80` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`Reserved`				`Stall` `RW 0x0`	`Snp` `RW 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DOEPINT12` `0xC88` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`StupPktRcvd` `RW 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`OutPktErr` `RW 0x0`	`Reserved`	`Back2BackSETup` `RW 0x0`	`StsPhseRcvd` `RW 0x0`	`OUTTknEPdis` `RW 0x0`	`SetUp` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DOEPTSIZ12` `0xC90` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`RxDPID` `RO 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DOEPDMA12` `0xC94` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DOEPDMAB12` `0xC9C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DOEPCTL13` `0xCA0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`Reserved`				`Stall` `RW 0x0`	`Snp` `RW 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DOEPINT13` `0xCA8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`StupPktRcvd` `RW 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`OutPktErr` `RW 0x0`	`Reserved`	`Back2BackSETup` `RW 0x0`	`StsPhseRcvd` `RW 0x0`	`OUTTknEPdis` `RW 0x0`	`SetUp` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DOEPTSIZ13` `0xCB0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`RxDPID` `RO 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DOEPDMA13` `0xCB4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DOEPDMAB13` `0xCBC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DOEPCTL14` `0xCC0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`Reserved`				`Stall` `RW 0x0`	`Snp` `RW 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DOEPINT14` `0xCC8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`StupPktRcvd` `RW 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`OutPktErr` `RW 0x0`	`Reserved`	`Back2BackSETup` `RW 0x0`	`StsPhseRcvd` `RW 0x0`	`OUTTknEPdis` `RW 0x0`	`SetUp` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DOEPTSIZ14` `0xCD0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`RxDPID` `RO 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DOEPDMA14` `0xCD4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DOEPDMAB14` `0xCDC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DOEPCTL15` `0xCE0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`Reserved`				`Stall` `RW 0x0`	`Snp` `RW 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DOEPINT15` `0xCE8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`StupPktRcvd` `RW 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`OutPktErr` `RW 0x0`	`Reserved`	`Back2BackSETup` `RW 0x0`	`StsPhseRcvd` `RW 0x0`	`OUTTknEPdis` `RW 0x0`	`SetUp` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DOEPTSIZ15` `0xCF0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`RxDPID` `RO 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DOEPDMA15` `0xCF4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DOEPDMAB15` `0xCFC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`PCGCCTL` `0xE00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`L1Suspended` `RO 0x0`	`PhySleep` `RO 0x0`	`Reserved`		`RstPdwnModule` `RW 0x0`	`Reserved`		`StopPclk` `RW 0x0`
`i_usbotg_1_DWC_otg_intreg`
`GOTGCTL` `0x0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`				`Reserved`						`CurMod` `RO 0x0`	`OTGVer` `RW 0x0`	`BSesVld` `RO 0x0`	`ASesVld` `RO 0x0`	`DbncTime` `RO 0x0`	`ConIDSts` `RO 0x1`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`			`EHEn` `RW 0x0`	`DevHNPEn` `RW 0x0`	`HstSetHNPEn` `RW 0x0`	`HNPReq` `RW 0x0`	`HstNegScs` `RO 0x0`	`BvalidOvVal` `RW 0x0`	`BvalidOvEn` `RW 0x0`	`AvalidOvVal` `RW 0x0`	`AvalidOvEn` `RW 0x0`	`VbvalidOvVal` `RW 0x0`	`VbvalidOvEn` `RW 0x0`	`SesReq` `RW 0x0`	`SesReqScs` `RO 0x0`
`GOTGINT` `0x4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`											`Reserved`	`DbnceDone` `RW 0x0`	`ADevTOUTChg` `RW 0x0`	`HstNegDet` `RW 0x0`	`RESERVED1` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED1` `RO 0x0`						`HstNegSucStsChng` `RW 0x0`	`SesReqSucStsChng` `RW 0x0`	`RESERVED2` `RO 0x0`					`SesEndDet` `RW 0x0`	`RESERVED3` `RO 0x0`
`GAHBCFG` `0x8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED1` `RO 0x0`							`InvDescEndianess` `RW 0x0`	`AHBSingle` `RW 0x0`	`NotiAllDmaWrit` `RW 0x0`	`RemMemSupp` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`							`PTxFEmpLvl` `RW 0x0`	`NPTxFEmpLvl` `RW 0x0`	`RESERVED` `RO 0x0`	`DMAEn` `RW 0x0`	`HBstLen` `RW 0x0`				`GlblIntrMsk` `RW 0x0`
`GUSBCFG` `0xC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`CorruptTxPkt` `WO 0x0`	`ForceDevMode` `RW 0x0`	`ForceHstMode` `RW 0x0`	`TxEndDelay` `RW 0x0`	`Reserved`	`IC_USBCap` `RO 0x0`	`ULPI` `RW 0x0`	`Indicator` `RW 0x0`	`Complement` `RW 0x0`	`TermSelDLPulse` `RW 0x0`	`ULPIExtVbusIndicator` `RW 0x0`	`ULPIExtVbusDrv` `RW 0x0`	`ULPIClkSusM` `RW 0x0`	`ULPIAutoRes` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`RESERVED` `RO 0x0`	`USBTrdTim` `RW 0x5`				`HNPCap` `RW 0x0`	`SRPCap` `RW 0x0`	`DDRSel` `RW 0x0`	`PHYSel` `RO 0x0`	`FSIntf` `RO 0x0`	`ULPI_UTMI_Sel` `RO 0x1`	`PHYIf` `RO 0x0`	`TOutCal` `RW 0x0`
`GRSTCTL` `0x10` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`AHBIdle` `RO 0x1`	`DMAReq` `RO 0x0`	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`					`TxFNum` `RW 0x0`					`TxFFlsh` `RW 0x0`	`RxFFlsh` `RW 0x0`	`Reserved`	`FrmCntrRst` `RW 0x0`	`PIUFSSftRst` `RW 0x0`	`CSftRst` `RW 0x0`
`GINTSTS` `0x14` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`WkUpInt` `RW 0x0`	`SessReqInt` `RW 0x0`	`DisconnInt` `RW 0x0`	`ConIDStsChng` `RW 0x1`	`Reserved`	`PTxFEmp` `RO 0x1`	`HChInt` `RO 0x0`	`PrtInt` `RO 0x0`	`ResetDet` `RW 0x0`	`FetSusp` `RW 0x0`	`incomplP` `RW 0x0`	`incompISOIN` `RW 0x0`	`OEPInt` `RO 0x0`	`IEPInt` `RO 0x0`	`EPMis` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EOPF` `RW 0x0`	`ISOOutDrop` `RW 0x0`	`EnumDone` `RW 0x0`	`USBRst` `RW 0x0`	`USBSusp` `RW 0x0`	`ErlySusp` `RW 0x0`	`Reserved`		`GOUTNakEff` `RO 0x0`	`GINNakEff` `RO 0x0`	`NPTxFEmp` `RO 0x1`	`RxFLvl` `RO 0x0`	`Sof` `RW 0x0`	`OTGInt` `RO 0x0`	`ModeMis` `RW 0x0`	`CurMod` `RO 0x0`
`GINTMSK` `0x18` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`WkUpIntMsk` `RW 0x0`	`SessReqIntMsk` `RW 0x0`	`DisconnIntMsk` `RW 0x0`	`ConIDStsChngMsk` `RW 0x0`	`Reserved`	`PTxFEmpMsk` `RW 0x0`	`HChIntMsk` `RW 0x0`	`PrtIntMsk` `RW 0x0`	`ResetDetMsk` `RW 0x0`	`FetSuspMsk` `RW 0x0`	`incomplPMsK` `RW 0x0`	`incompISOINMsk` `RW 0x0`	`OEPIntMsk` `RW 0x0`	`IEPIntMsk` `RW 0x0`	`EPMisMsk` `RW 0x0`	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EOPFMsk` `RW 0x0`	`ISOOutDropMsk` `RW 0x0`	`EnumDoneMsk` `RW 0x0`	`USBRstMsk` `RW 0x0`	`USBSuspMsk` `RW 0x0`	`ErlySuspMsk` `RW 0x0`	`Reserved`		`GOUTNakEffMsk` `RW 0x0`	`GINNakEffMsk` `RW 0x0`	`NPTxFEmpMsk` `RW 0x0`	`RxFLvlMsk` `RW 0x0`	`SofMsk` `RW 0x0`	`OTGIntMsk` `RW 0x0`	`ModeMisMsk` `RW 0x0`	`RESERVED` `RO 0x0`
`GRXSTSR` `0x1C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`RESERVED` `RO 0x0`						`FN` `RO 0x0`				`PktSts` `RO 0x0`				`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DPID` `RO 0x0`	`BCnt` `RO 0x0`											`ChNum` `RO 0x0`
`GRXSTSP` `0x20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`RESERVED` `RO 0x0`						`FN` `RO 0x0`				`PktSts` `RO 0x0`				`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DPID` `RO 0x0`	`BCnt` `RO 0x0`											`ChNum` `RO 0x0`
`GRXFSIZ` `0x24` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`				`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`RxFDep` `RW 0x2000`
`GNPTXFSIZ` `0x28` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`NPTXFDep` `RW 0x2000`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`NPTXFStAddr` `RW 0x2000`
`GNPTXSTS` `0x2C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`NPTxQTop` `RO 0x0`							`NPTxQSpcAvail` `RO 0x8`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`NPTxFSpcAvail` `RO 0x2000`
`GPVNDCTL` `0x34` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DisUlpiDrvr` `RW 0x0`	`RESERVED` `RO 0x0`			`VStsDone` `RW 0x0`	`VStsBsy` `RO 0x0`	`NewRegReq` `RW 0x0`	`RESERVED1` `RO 0x0`		`RegWr` `RW 0x0`	`RegAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`VCtrl` `RW 0x0`								`RegData` `RW 0x0`
`GGPIO` `0x38` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`GPO` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`GPI` `RO 0x0`
`GUID` `0x3C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`GUID` `RO 0x12345678`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`GUID` `RO 0x12345678`
`GSNPSID` `0x40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SynopsysID` `RO 0x4F54330A`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`SynopsysID` `RO 0x4F54330A`
`GHWCFG1` `0x44` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EpDir` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EpDir` `RO 0x0`
`GHWCFG2` `0x48` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`	`TknQDepth` `RO 0x8`					`PTxQDepth` `RO 0x3`		`NPTxQDepth` `RO 0x2`		`RESERVED` `RO 0x0`	`MultiProcIntrpt` `RO 0x0`	`DynFifoSizing` `RO 0x1`	`PerioSupport` `RO 0x1`	`NumHstChnl` `RO 0xF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`NumHstChnl` `RO 0xF`		`NumDevEps` `RO 0xF`				`FSPhyType` `RO 0x0`		`HSPhyType` `RO 0x2`		`SingPnt` `RO 0x0`	`OtgArch` `RO 0x2`		`OtgMode` `RO 0x0`
`GHWCFG3` `0x4C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DfifoDepth` `RO 0x1F80`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`LPMMode` `RO 0x0`	`BCSupport` `RO 0x0`	`HSICMode` `RO 0x0`	`ADPSupport` `RO 0x0`	`RstType` `RO 0x0`	`OptFeature` `RO 0x0`	`VndctlSupt` `RO 0x1`	`I2CIntSel` `RO 0x0`	`OtgEn` `RO 0x1`	`PktSizeWidth` `RO 0x6`			`XferSizeWidth` `RO 0x8`
`GHWCFG4` `0x50` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DescDMA` `RO 0x1`	`DescDMAEnabled` `RO 0x1`	`INEps` `RO 0xF`				`DedFifoMode` `RO 0x1`	`SessEndFltr` `RO 0x0`	`BValidFltr` `RO 0x0`	`AValidFltr` `RO 0x0`	`VBusValidFltr` `RO 0x0`	`IddgFltr` `RO 0x0`	`NumCtlEps` `RO 0xF`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PhyDataWidth` `RO 0x0`		`RESERVED` `RO 0x0`						`ExtendedHibernation` `RO 0x0`	`Hibernation` `RO 0x0`	`AhbFreq` `RO 0x1`	`PartialPwrDn` `RO 0x0`	`NumDevPerioEps` `RO 0x0`
`GDFIFOCFG` `0x5C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPInfoBaseAddr` `RW 0x1F80`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`GDFIFOCfg` `RW 0x2000`
`HPTXFSIZ` `0x100` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`PTxFSize` `RW 0x2000`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`PTxFStAddr` `RW 0x4000`
`DIEPTXF1` `0x104` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`INEPnTxFDep` `RW 0x2000`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`INEPnTxFStAddr` `RW 0x4000`
`DIEPTXF2` `0x108` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`INEPnTxFDep` `RW 0x2000`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`	`INEPnTxFStAddr` `RW 0x6000`
`DIEPTXF3` `0x10C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`INEPnTxFDep` `RW 0x2000`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPnTxFStAddr` `RW 0x8000`
`DIEPTXF4` `0x110` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`INEPnTxFDep` `RW 0x2000`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPnTxFStAddr` `RW 0xA000`
`DIEPTXF5` `0x114` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`INEPnTxFDep` `RW 0x2000`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPnTxFStAddr` `RW 0xC000`
`DIEPTXF6` `0x118` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`INEPnTxFDep` `RW 0x2000`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPnTxFStAddr` `RW 0xE000`
`DIEPTXF7` `0x11C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`INEPnTxFDep` `RW 0x2000`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPnTxFStAddr` `RW 0x0`
`DIEPTXF8` `0x120` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`INEPnTxFDep` `RW 0x2000`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPnTxFStAddr` `RW 0x2000`
`DIEPTXF9` `0x124` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`INEPnTxFDep` `RW 0x2000`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPnTxFStAddr` `RW 0x4000`
`DIEPTXF10` `0x128` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`INEPnTxFDep` `RW 0x2000`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPnTxFStAddr` `RW 0x6000`
`DIEPTXF11` `0x12C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`INEPnTxFDep` `RW 0x2000`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPnTxFStAddr` `RW 0x8000`
`DIEPTXF12` `0x130` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`INEPnTxFDep` `RW 0x2000`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPnTxFStAddr` `RW 0xA000`
`DIEPTXF13` `0x134` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`INEPnTxFDep` `RW 0x2000`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPnTxFStAddr` `RW 0xC000`
`DIEPTXF14` `0x138` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`INEPnTxFDep` `RW 0x2000`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPnTxFStAddr` `RW 0xE000`
`DIEPTXF15` `0x13C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`		`INEPnTxFDep` `RW 0x2000`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPnTxFStAddr` `RW 0x0`
`HCFG` `0x400` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ModeChTimEn` `RW 0x0`	`RESERVED` `RO 0x0`				`PerSchedEna` `RW 0x0`	`FrListEn` `RW 0x0`		`DescDMA` `RW 0x0`	`RESERVED1` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ResValid` `RW 0x2`								`Ena32KHzS` `RW 0x0`	`RESERVED2` `RO 0x0`				`FSLSSupp` `RW 0x0`	`FSLSPclkSel` `RW 0x0`
`HFIR` `0x404` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`															`HFIRRldCtrl` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`FrInt` `RW 0xEA60`
`HFNUM` `0x408` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`FrRem` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`FrNum` `RO 0x3FFF`
`HPTXSTS` `0x410` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`PTxQTop` `RO 0x0`								`PTxQSpcAvail` `RO 0x10`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PTxFSpcAvail` `RO 0x2000`
`HAINT` `0x414` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HAINT` `RO 0x0`
`HAINTMSK` `0x418` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HAINTMsk` `RW 0x0`
`HFLBAddr` `0x41C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`HFLBAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HFLBAddr` `RW 0x0`
`HPRT` `0x440` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`													`PrtSpd` `RO 0x0`		`PrtTstCtl` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`PrtTstCtl` `RW 0x0`			`PrtPwr` `RW 0x0`	`PrtLnSts` `RO 0x0`		`RESERVED` `RO 0x0`	`PrtRst` `RW 0x0`	`PrtSusp` `RW 0x0`	`PrtRes` `RW 0x0`	`PrtOvrCurrChng` `RW 0x0`	`PrtOvrCurrAct` `RO 0x0`	`PrtEnChng` `RW 0x0`	`PrtEna` `RW 0x0`	`PrtConnDet` `RW 0x0`	`PrtConnSts` `RO 0x0`
`HCCHAR0` `0x500` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ChEna` `RW 0x0`	`ChDis` `RW 0x0`	`OddFrm` `RW 0x0`	`DevAddr` `RW 0x0`							`EC` `RW 0x0`		`EPType` `RW 0x0`		`LSpdDev` `RW 0x0`	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EPDir` `RW 0x0`	`EPNum` `RW 0x0`				`MPS` `RW 0x0`
`HCSPLT0` `0x504` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SpltEna` `RW 0x0`	`RESERVED` `RO 0x0`														`CompSplt` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XactPos` `RW 0x0`		`HubAddr` `RW 0x0`							`PrtAddr` `RW 0x0`
`HCINT0` `0x508` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`DESC_LST_ROLLIntr` `RW 0x0`	`XCS_XACT_ERR` `RW 0x0`	`BNAIntr` `RW 0x0`	`DataTglErr` `RW 0x0`	`FrmOvrun` `RW 0x0`	`BblErr` `RW 0x0`	`XactErr` `RW 0x0`	`NYET` `RW 0x0`	`ACK` `RW 0x0`	`NAK` `RW 0x0`	`STALL` `RW 0x0`	`AHBErr` `RW 0x0`	`ChHltd` `RW 0x0`	`XferCompl` `RW 0x0`
`HCINTMSK0` `0x50C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`FRM_LST_ROLLIntrMsk` `RW 0x0`	`RESERVED1` `RO 0x0`	`BNAIntrMsk` `RW 0x0`	`DataTglErrMsk` `RW 0x0`	`FrmOvrunMsk` `RW 0x0`	`BblErrMsk` `RW 0x0`	`XactErrMsk` `RW 0x0`	`NyetMsk` `RW 0x0`	`AckMsk` `RW 0x0`	`NakMsk` `RW 0x0`	`StallMsk` `RW 0x0`	`AHBErrMsk` `RW 0x0`	`ChHltdMsk` `RW 0x0`	`XferComplMsk` `RW 0x0`
`HCTSIZ0` `0x510` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DoPng` `RW 0x0`	`Pid` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`HCDMA0` `0x514` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`HCDMAB0` `0x51C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`HCDMAB` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HCDMAB` `RW 0x0`
`HCCHAR1` `0x520` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ChEna` `RW 0x0`	`ChDis` `RW 0x0`	`OddFrm` `RW 0x0`	`DevAddr` `RW 0x0`							`EC` `RW 0x0`		`EPType` `RW 0x0`		`LSpdDev` `RW 0x0`	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EPDir` `RW 0x0`	`EPNum` `RW 0x0`				`MPS` `RW 0x0`
`HCSPLT1` `0x524` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SpltEna` `RW 0x0`	`RESERVED` `RO 0x0`														`CompSplt` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XactPos` `RW 0x0`		`HubAddr` `RW 0x0`							`PrtAddr` `RW 0x0`
`HCINT1` `0x528` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`DESC_LST_ROLLIntr` `RW 0x0`	`XCS_XACT_ERR` `RW 0x0`	`BNAIntr` `RW 0x0`	`DataTglErr` `RW 0x0`	`FrmOvrun` `RW 0x0`	`BblErr` `RW 0x0`	`XactErr` `RW 0x0`	`NYET` `RW 0x0`	`ACK` `RW 0x0`	`NAK` `RW 0x0`	`STALL` `RW 0x0`	`AHBErr` `RW 0x0`	`ChHltd` `RW 0x0`	`XferCompl` `RW 0x0`
`HCINTMSK1` `0x52C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`FRM_LST_ROLLIntrMsk` `RW 0x0`	`RESERVED1` `RO 0x0`	`BNAIntrMsk` `RW 0x0`	`DataTglErrMsk` `RW 0x0`	`FrmOvrunMsk` `RW 0x0`	`BblErrMsk` `RW 0x0`	`XactErrMsk` `RW 0x0`	`NyetMsk` `RW 0x0`	`AckMsk` `RW 0x0`	`NakMsk` `RW 0x0`	`StallMsk` `RW 0x0`	`AHBErrMsk` `RW 0x0`	`ChHltdMsk` `RW 0x0`	`XferComplMsk` `RW 0x0`
`HCTSIZ1` `0x530` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DoPng` `RW 0x0`	`Pid` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`HCDMA1` `0x534` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`HCDMAB1` `0x53C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`HCDMAB` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HCDMAB` `RW 0x0`
`HCCHAR2` `0x540` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ChEna` `RW 0x0`	`ChDis` `RW 0x0`	`OddFrm` `RW 0x0`	`DevAddr` `RW 0x0`							`EC` `RW 0x0`		`EPType` `RW 0x0`		`LSpdDev` `RW 0x0`	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EPDir` `RW 0x0`	`EPNum` `RW 0x0`				`MPS` `RW 0x0`
`HCSPLT2` `0x544` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SpltEna` `RW 0x0`	`RESERVED` `RO 0x0`														`CompSplt` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XactPos` `RW 0x0`		`HubAddr` `RW 0x0`							`PrtAddr` `RW 0x0`
`HCINT2` `0x548` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`DESC_LST_ROLLIntr` `RW 0x0`	`XCS_XACT_ERR` `RW 0x0`	`BNAIntr` `RW 0x0`	`DataTglErr` `RW 0x0`	`FrmOvrun` `RW 0x0`	`BblErr` `RW 0x0`	`XactErr` `RW 0x0`	`NYET` `RW 0x0`	`ACK` `RW 0x0`	`NAK` `RW 0x0`	`STALL` `RW 0x0`	`AHBErr` `RW 0x0`	`ChHltd` `RW 0x0`	`XferCompl` `RW 0x0`
`HCINTMSK2` `0x54C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`FRM_LST_ROLLIntrMsk` `RW 0x0`	`RESERVED1` `RO 0x0`	`BNAIntrMsk` `RW 0x0`	`DataTglErrMsk` `RW 0x0`	`FrmOvrunMsk` `RW 0x0`	`BblErrMsk` `RW 0x0`	`XactErrMsk` `RW 0x0`	`NyetMsk` `RW 0x0`	`AckMsk` `RW 0x0`	`NakMsk` `RW 0x0`	`StallMsk` `RW 0x0`	`AHBErrMsk` `RW 0x0`	`ChHltdMsk` `RW 0x0`	`XferComplMsk` `RW 0x0`
`HCTSIZ2` `0x550` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DoPng` `RW 0x0`	`Pid` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`HCDMA2` `0x554` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`HCDMAB2` `0x55C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`HCDMAB` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HCDMAB` `RW 0x0`
`HCCHAR3` `0x560` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ChEna` `RW 0x0`	`ChDis` `RW 0x0`	`OddFrm` `RW 0x0`	`DevAddr` `RW 0x0`							`EC` `RW 0x0`		`EPType` `RW 0x0`		`LSpdDev` `RW 0x0`	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EPDir` `RW 0x0`	`EPNum` `RW 0x0`				`MPS` `RW 0x0`
`HCSPLT3` `0x564` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SpltEna` `RW 0x0`	`RESERVED` `RO 0x0`														`CompSplt` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XactPos` `RW 0x0`		`HubAddr` `RW 0x0`							`PrtAddr` `RW 0x0`
`HCINT3` `0x568` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`DESC_LST_ROLLIntr` `RW 0x0`	`XCS_XACT_ERR` `RW 0x0`	`BNAIntr` `RW 0x0`	`DataTglErr` `RW 0x0`	`FrmOvrun` `RW 0x0`	`BblErr` `RW 0x0`	`XactErr` `RW 0x0`	`NYET` `RW 0x0`	`ACK` `RW 0x0`	`NAK` `RW 0x0`	`STALL` `RW 0x0`	`AHBErr` `RW 0x0`	`ChHltd` `RW 0x0`	`XferCompl` `RW 0x0`
`HCINTMSK3` `0x56C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`FRM_LST_ROLLIntrMsk` `RW 0x0`	`RESERVED1` `RO 0x0`	`BNAIntrMsk` `RW 0x0`	`DataTglErrMsk` `RW 0x0`	`FrmOvrunMsk` `RW 0x0`	`BblErrMsk` `RW 0x0`	`XactErrMsk` `RW 0x0`	`NyetMsk` `RW 0x0`	`AckMsk` `RW 0x0`	`NakMsk` `RW 0x0`	`StallMsk` `RW 0x0`	`AHBErrMsk` `RW 0x0`	`ChHltdMsk` `RW 0x0`	`XferComplMsk` `RW 0x0`
`HCTSIZ3` `0x570` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DoPng` `RW 0x0`	`Pid` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`HCDMA3` `0x574` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`HCDMAB3` `0x57C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`HCDMAB` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HCDMAB` `RW 0x0`
`HCCHAR4` `0x580` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ChEna` `RW 0x0`	`ChDis` `RW 0x0`	`OddFrm` `RW 0x0`	`DevAddr` `RW 0x0`							`EC` `RW 0x0`		`EPType` `RW 0x0`		`LSpdDev` `RW 0x0`	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EPDir` `RW 0x0`	`EPNum` `RW 0x0`				`MPS` `RW 0x0`
`HCSPLT4` `0x584` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SpltEna` `RW 0x0`	`RESERVED` `RO 0x0`														`CompSplt` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XactPos` `RW 0x0`		`HubAddr` `RW 0x0`							`PrtAddr` `RW 0x0`
`HCINT4` `0x588` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`DESC_LST_ROLLIntr` `RW 0x0`	`XCS_XACT_ERR` `RW 0x0`	`BNAIntr` `RW 0x0`	`DataTglErr` `RW 0x0`	`FrmOvrun` `RW 0x0`	`BblErr` `RW 0x0`	`XactErr` `RW 0x0`	`NYET` `RW 0x0`	`ACK` `RW 0x0`	`NAK` `RW 0x0`	`STALL` `RW 0x0`	`AHBErr` `RW 0x0`	`ChHltd` `RW 0x0`	`XferCompl` `RW 0x0`
`HCINTMSK4` `0x58C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`FRM_LST_ROLLIntrMsk` `RW 0x0`	`RESERVED1` `RO 0x0`	`BNAIntrMsk` `RW 0x0`	`DataTglErrMsk` `RW 0x0`	`FrmOvrunMsk` `RW 0x0`	`BblErrMsk` `RW 0x0`	`XactErrMsk` `RW 0x0`	`NyetMsk` `RW 0x0`	`AckMsk` `RW 0x0`	`NakMsk` `RW 0x0`	`StallMsk` `RW 0x0`	`AHBErrMsk` `RW 0x0`	`ChHltdMsk` `RW 0x0`	`XferComplMsk` `RW 0x0`
`HCTSIZ4` `0x590` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DoPng` `RW 0x0`	`Pid` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`HCDMA4` `0x594` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`HCDMAB4` `0x59C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`HCDMAB` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HCDMAB` `RW 0x0`
`HCCHAR5` `0x5A0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ChEna` `RW 0x0`	`ChDis` `RW 0x0`	`OddFrm` `RW 0x0`	`DevAddr` `RW 0x0`							`EC` `RW 0x0`		`EPType` `RW 0x0`		`LSpdDev` `RW 0x0`	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EPDir` `RW 0x0`	`EPNum` `RW 0x0`				`MPS` `RW 0x0`
`HCSPLT5` `0x5A4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SpltEna` `RW 0x0`	`RESERVED` `RO 0x0`														`CompSplt` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XactPos` `RW 0x0`		`HubAddr` `RW 0x0`							`PrtAddr` `RW 0x0`
`HCINT5` `0x5A8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`DESC_LST_ROLLIntr` `RW 0x0`	`XCS_XACT_ERR` `RW 0x0`	`BNAIntr` `RW 0x0`	`DataTglErr` `RW 0x0`	`FrmOvrun` `RW 0x0`	`BblErr` `RW 0x0`	`XactErr` `RW 0x0`	`NYET` `RW 0x0`	`ACK` `RW 0x0`	`NAK` `RW 0x0`	`STALL` `RW 0x0`	`AHBErr` `RW 0x0`	`ChHltd` `RW 0x0`	`XferCompl` `RW 0x0`
`HCINTMSK5` `0x5AC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`FRM_LST_ROLLIntrMsk` `RW 0x0`	`RESERVED1` `RO 0x0`	`BNAIntrMsk` `RW 0x0`	`DataTglErrMsk` `RW 0x0`	`FrmOvrunMsk` `RW 0x0`	`BblErrMsk` `RW 0x0`	`XactErrMsk` `RW 0x0`	`NyetMsk` `RW 0x0`	`AckMsk` `RW 0x0`	`NakMsk` `RW 0x0`	`StallMsk` `RW 0x0`	`AHBErrMsk` `RW 0x0`	`ChHltdMsk` `RW 0x0`	`XferComplMsk` `RW 0x0`
`HCTSIZ5` `0x5B0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DoPng` `RW 0x0`	`Pid` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`HCDMA5` `0x5B4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`HCDMAB5` `0x5BC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`HCDMAB` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HCDMAB` `RW 0x0`
`HCCHAR6` `0x5C0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ChEna` `RW 0x0`	`ChDis` `RW 0x0`	`OddFrm` `RW 0x0`	`DevAddr` `RW 0x0`							`EC` `RW 0x0`		`EPType` `RW 0x0`		`LSpdDev` `RW 0x0`	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EPDir` `RW 0x0`	`EPNum` `RW 0x0`				`MPS` `RW 0x0`
`HCSPLT6` `0x5C4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SpltEna` `RW 0x0`	`RESERVED` `RO 0x0`														`CompSplt` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XactPos` `RW 0x0`		`HubAddr` `RW 0x0`							`PrtAddr` `RW 0x0`
`HCINT6` `0x5C8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`DESC_LST_ROLLIntr` `RW 0x0`	`XCS_XACT_ERR` `RW 0x0`	`BNAIntr` `RW 0x0`	`DataTglErr` `RW 0x0`	`FrmOvrun` `RW 0x0`	`BblErr` `RW 0x0`	`XactErr` `RW 0x0`	`NYET` `RW 0x0`	`ACK` `RW 0x0`	`NAK` `RW 0x0`	`STALL` `RW 0x0`	`AHBErr` `RW 0x0`	`ChHltd` `RW 0x0`	`XferCompl` `RW 0x0`
`HCINTMSK6` `0x5CC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`FRM_LST_ROLLIntrMsk` `RW 0x0`	`RESERVED1` `RO 0x0`	`BNAIntrMsk` `RW 0x0`	`DataTglErrMsk` `RW 0x0`	`FrmOvrunMsk` `RW 0x0`	`BblErrMsk` `RW 0x0`	`XactErrMsk` `RW 0x0`	`NyetMsk` `RW 0x0`	`AckMsk` `RW 0x0`	`NakMsk` `RW 0x0`	`StallMsk` `RW 0x0`	`AHBErrMsk` `RW 0x0`	`ChHltdMsk` `RW 0x0`	`XferComplMsk` `RW 0x0`
`HCTSIZ6` `0x5D0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DoPng` `RW 0x0`	`Pid` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`HCDMA6` `0x5D4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`HCDMAB6` `0x5DC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`HCDMAB` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HCDMAB` `RW 0x0`
`HCCHAR7` `0x5E0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ChEna` `RW 0x0`	`ChDis` `RW 0x0`	`OddFrm` `RW 0x0`	`DevAddr` `RW 0x0`							`EC` `RW 0x0`		`EPType` `RW 0x0`		`LSpdDev` `RW 0x0`	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EPDir` `RW 0x0`	`EPNum` `RW 0x0`				`MPS` `RW 0x0`
`HCSPLT7` `0x5E4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SpltEna` `RW 0x0`	`RESERVED` `RO 0x0`														`CompSplt` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XactPos` `RW 0x0`		`HubAddr` `RW 0x0`							`PrtAddr` `RW 0x0`
`HCINT7` `0x5E8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`DESC_LST_ROLLIntr` `RW 0x0`	`XCS_XACT_ERR` `RW 0x0`	`BNAIntr` `RW 0x0`	`DataTglErr` `RW 0x0`	`FrmOvrun` `RW 0x0`	`BblErr` `RW 0x0`	`XactErr` `RW 0x0`	`NYET` `RW 0x0`	`ACK` `RW 0x0`	`NAK` `RW 0x0`	`STALL` `RW 0x0`	`AHBErr` `RW 0x0`	`ChHltd` `RW 0x0`	`XferCompl` `RW 0x0`
`HCINTMSK7` `0x5EC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`FRM_LST_ROLLIntrMsk` `RW 0x0`	`RESERVED1` `RO 0x0`	`BNAIntrMsk` `RW 0x0`	`DataTglErrMsk` `RW 0x0`	`FrmOvrunMsk` `RW 0x0`	`BblErrMsk` `RW 0x0`	`XactErrMsk` `RW 0x0`	`NyetMsk` `RW 0x0`	`AckMsk` `RW 0x0`	`NakMsk` `RW 0x0`	`StallMsk` `RW 0x0`	`AHBErrMsk` `RW 0x0`	`ChHltdMsk` `RW 0x0`	`XferComplMsk` `RW 0x0`
`HCTSIZ7` `0x5F0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DoPng` `RW 0x0`	`Pid` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`HCDMA7` `0x5F4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`HCDMAB7` `0x5FC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`HCDMAB` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HCDMAB` `RW 0x0`
`HCCHAR8` `0x600` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ChEna` `RW 0x0`	`ChDis` `RW 0x0`	`OddFrm` `RW 0x0`	`DevAddr` `RW 0x0`							`EC` `RW 0x0`		`EPType` `RW 0x0`		`LSpdDev` `RW 0x0`	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EPDir` `RW 0x0`	`EPNum` `RW 0x0`				`MPS` `RW 0x0`
`HCSPLT8` `0x604` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SpltEna` `RW 0x0`	`RESERVED` `RO 0x0`														`CompSplt` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XactPos` `RW 0x0`		`HubAddr` `RW 0x0`							`PrtAddr` `RW 0x0`
`HCINT8` `0x608` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`DESC_LST_ROLLIntr` `RW 0x0`	`XCS_XACT_ERR` `RW 0x0`	`BNAIntr` `RW 0x0`	`DataTglErr` `RW 0x0`	`FrmOvrun` `RW 0x0`	`BblErr` `RW 0x0`	`XactErr` `RW 0x0`	`NYET` `RW 0x0`	`ACK` `RW 0x0`	`NAK` `RW 0x0`	`STALL` `RW 0x0`	`AHBErr` `RW 0x0`	`ChHltd` `RW 0x0`	`XferCompl` `RW 0x0`
`HCINTMSK8` `0x60C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`FRM_LST_ROLLIntrMsk` `RW 0x0`	`RESERVED1` `RO 0x0`	`BNAIntrMsk` `RW 0x0`	`DataTglErrMsk` `RW 0x0`	`FrmOvrunMsk` `RW 0x0`	`BblErrMsk` `RW 0x0`	`XactErrMsk` `RW 0x0`	`NyetMsk` `RW 0x0`	`AckMsk` `RW 0x0`	`NakMsk` `RW 0x0`	`StallMsk` `RW 0x0`	`AHBErrMsk` `RW 0x0`	`ChHltdMsk` `RW 0x0`	`XferComplMsk` `RW 0x0`
`HCTSIZ8` `0x610` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DoPng` `RW 0x0`	`Pid` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`HCDMA8` `0x614` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`HCDMAB8` `0x61C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`HCDMAB` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HCDMAB` `RW 0x0`
`HCCHAR9` `0x620` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ChEna` `RW 0x0`	`ChDis` `RW 0x0`	`OddFrm` `RW 0x0`	`DevAddr` `RW 0x0`							`EC` `RW 0x0`		`EPType` `RW 0x0`		`LSpdDev` `RW 0x0`	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EPDir` `RW 0x0`	`EPNum` `RW 0x0`				`MPS` `RW 0x0`
`HCSPLT9` `0x624` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SpltEna` `RW 0x0`	`RESERVED` `RO 0x0`														`CompSplt` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XactPos` `RW 0x0`		`HubAddr` `RW 0x0`							`PrtAddr` `RW 0x0`
`HCINT9` `0x628` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`DESC_LST_ROLLIntr` `RW 0x0`	`XCS_XACT_ERR` `RW 0x0`	`BNAIntr` `RW 0x0`	`DataTglErr` `RW 0x0`	`FrmOvrun` `RW 0x0`	`BblErr` `RW 0x0`	`XactErr` `RW 0x0`	`NYET` `RW 0x0`	`ACK` `RW 0x0`	`NAK` `RW 0x0`	`STALL` `RW 0x0`	`AHBErr` `RW 0x0`	`ChHltd` `RW 0x0`	`XferCompl` `RW 0x0`
`HCINTMSK9` `0x62C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`FRM_LST_ROLLIntrMsk` `RW 0x0`	`RESERVED1` `RO 0x0`	`BNAIntrMsk` `RW 0x0`	`DataTglErrMsk` `RW 0x0`	`FrmOvrunMsk` `RW 0x0`	`BblErrMsk` `RW 0x0`	`XactErrMsk` `RW 0x0`	`NyetMsk` `RW 0x0`	`AckMsk` `RW 0x0`	`NakMsk` `RW 0x0`	`StallMsk` `RW 0x0`	`AHBErrMsk` `RW 0x0`	`ChHltdMsk` `RW 0x0`	`XferComplMsk` `RW 0x0`
`HCTSIZ9` `0x630` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DoPng` `RW 0x0`	`Pid` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`HCDMA9` `0x634` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`HCDMAB9` `0x63C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`HCDMAB` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HCDMAB` `RW 0x0`
`HCCHAR10` `0x640` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ChEna` `RW 0x0`	`ChDis` `RW 0x0`	`OddFrm` `RW 0x0`	`DevAddr` `RW 0x0`							`EC` `RW 0x0`		`EPType` `RW 0x0`		`LSpdDev` `RW 0x0`	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EPDir` `RW 0x0`	`EPNum` `RW 0x0`				`MPS` `RW 0x0`
`HCSPLT10` `0x644` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SpltEna` `RW 0x0`	`RESERVED` `RO 0x0`														`CompSplt` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XactPos` `RW 0x0`		`HubAddr` `RW 0x0`							`PrtAddr` `RW 0x0`
`HCINT10` `0x648` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`DESC_LST_ROLLIntr` `RW 0x0`	`XCS_XACT_ERR` `RW 0x0`	`BNAIntr` `RW 0x0`	`DataTglErr` `RW 0x0`	`FrmOvrun` `RW 0x0`	`BblErr` `RW 0x0`	`XactErr` `RW 0x0`	`NYET` `RW 0x0`	`ACK` `RW 0x0`	`NAK` `RW 0x0`	`STALL` `RW 0x0`	`AHBErr` `RW 0x0`	`ChHltd` `RW 0x0`	`XferCompl` `RW 0x0`
`HCINTMSK10` `0x64C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`FRM_LST_ROLLIntrMsk` `RW 0x0`	`RESERVED1` `RO 0x0`	`BNAIntrMsk` `RW 0x0`	`DataTglErrMsk` `RW 0x0`	`FrmOvrunMsk` `RW 0x0`	`BblErrMsk` `RW 0x0`	`XactErrMsk` `RW 0x0`	`NyetMsk` `RW 0x0`	`AckMsk` `RW 0x0`	`NakMsk` `RW 0x0`	`StallMsk` `RW 0x0`	`AHBErrMsk` `RW 0x0`	`ChHltdMsk` `RW 0x0`	`XferComplMsk` `RW 0x0`
`HCTSIZ10` `0x650` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DoPng` `RW 0x0`	`Pid` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`HCDMA10` `0x654` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`HCDMAB10` `0x65C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`HCDMAB` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HCDMAB` `RW 0x0`
`HCCHAR11` `0x660` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ChEna` `RW 0x0`	`ChDis` `RW 0x0`	`OddFrm` `RW 0x0`	`DevAddr` `RW 0x0`							`EC` `RW 0x0`		`EPType` `RW 0x0`		`LSpdDev` `RW 0x0`	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EPDir` `RW 0x0`	`EPNum` `RW 0x0`				`MPS` `RW 0x0`
`HCSPLT11` `0x664` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SpltEna` `RW 0x0`	`RESERVED` `RO 0x0`														`CompSplt` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XactPos` `RW 0x0`		`HubAddr` `RW 0x0`							`PrtAddr` `RW 0x0`
`HCINT11` `0x668` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`DESC_LST_ROLLIntr` `RW 0x0`	`XCS_XACT_ERR` `RW 0x0`	`BNAIntr` `RW 0x0`	`DataTglErr` `RW 0x0`	`FrmOvrun` `RW 0x0`	`BblErr` `RW 0x0`	`XactErr` `RW 0x0`	`NYET` `RW 0x0`	`ACK` `RW 0x0`	`NAK` `RW 0x0`	`STALL` `RW 0x0`	`AHBErr` `RW 0x0`	`ChHltd` `RW 0x0`	`XferCompl` `RW 0x0`
`HCINTMSK11` `0x66C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`FRM_LST_ROLLIntrMsk` `RW 0x0`	`RESERVED1` `RO 0x0`	`BNAIntrMsk` `RW 0x0`	`DataTglErrMsk` `RW 0x0`	`FrmOvrunMsk` `RW 0x0`	`BblErrMsk` `RW 0x0`	`XactErrMsk` `RW 0x0`	`NyetMsk` `RW 0x0`	`AckMsk` `RW 0x0`	`NakMsk` `RW 0x0`	`StallMsk` `RW 0x0`	`AHBErrMsk` `RW 0x0`	`ChHltdMsk` `RW 0x0`	`XferComplMsk` `RW 0x0`
`HCTSIZ11` `0x670` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DoPng` `RW 0x0`	`Pid` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`HCDMA11` `0x674` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`HCDMAB11` `0x67C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`HCDMAB` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HCDMAB` `RW 0x0`
`HCCHAR12` `0x680` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ChEna` `RW 0x0`	`ChDis` `RW 0x0`	`OddFrm` `RW 0x0`	`DevAddr` `RW 0x0`							`EC` `RW 0x0`		`EPType` `RW 0x0`		`LSpdDev` `RW 0x0`	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EPDir` `RW 0x0`	`EPNum` `RW 0x0`				`MPS` `RW 0x0`
`HCSPLT12` `0x684` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SpltEna` `RW 0x0`	`RESERVED` `RO 0x0`														`CompSplt` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XactPos` `RW 0x0`		`HubAddr` `RW 0x0`							`PrtAddr` `RW 0x0`
`HCINT12` `0x688` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`DESC_LST_ROLLIntr` `RW 0x0`	`XCS_XACT_ERR` `RW 0x0`	`BNAIntr` `RW 0x0`	`DataTglErr` `RW 0x0`	`FrmOvrun` `RW 0x0`	`BblErr` `RW 0x0`	`XactErr` `RW 0x0`	`NYET` `RW 0x0`	`ACK` `RW 0x0`	`NAK` `RW 0x0`	`STALL` `RW 0x0`	`AHBErr` `RW 0x0`	`ChHltd` `RW 0x0`	`XferCompl` `RW 0x0`
`HCINTMSK12` `0x68C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`FRM_LST_ROLLIntrMsk` `RW 0x0`	`RESERVED1` `RO 0x0`	`BNAIntrMsk` `RW 0x0`	`DataTglErrMsk` `RW 0x0`	`FrmOvrunMsk` `RW 0x0`	`BblErrMsk` `RW 0x0`	`XactErrMsk` `RW 0x0`	`NyetMsk` `RW 0x0`	`AckMsk` `RW 0x0`	`NakMsk` `RW 0x0`	`StallMsk` `RW 0x0`	`AHBErrMsk` `RW 0x0`	`ChHltdMsk` `RW 0x0`	`XferComplMsk` `RW 0x0`
`HCTSIZ12` `0x690` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DoPng` `RW 0x0`	`Pid` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`HCDMA12` `0x694` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`HCDMAB12` `0x69C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`HCDMAB` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HCDMAB` `RW 0x0`
`HCCHAR13` `0x6A0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ChEna` `RW 0x0`	`ChDis` `RW 0x0`	`OddFrm` `RW 0x0`	`DevAddr` `RW 0x0`							`EC` `RW 0x0`		`EPType` `RW 0x0`		`LSpdDev` `RW 0x0`	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EPDir` `RW 0x0`	`EPNum` `RW 0x0`				`MPS` `RW 0x0`
`HCSPLT13` `0x6A4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SpltEna` `RW 0x0`	`RESERVED` `RO 0x0`														`CompSplt` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XactPos` `RW 0x0`		`HubAddr` `RW 0x0`							`PrtAddr` `RW 0x0`
`HCINT13` `0x6A8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`DESC_LST_ROLLIntr` `RW 0x0`	`XCS_XACT_ERR` `RW 0x0`	`BNAIntr` `RW 0x0`	`DataTglErr` `RW 0x0`	`FrmOvrun` `RW 0x0`	`BblErr` `RW 0x0`	`XactErr` `RW 0x0`	`NYET` `RW 0x0`	`ACK` `RW 0x0`	`NAK` `RW 0x0`	`STALL` `RW 0x0`	`AHBErr` `RW 0x0`	`ChHltd` `RW 0x0`	`XferCompl` `RW 0x0`
`HCINTMSK13` `0x6AC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`FRM_LST_ROLLIntrMsk` `RW 0x0`	`RESERVED1` `RO 0x0`	`BNAIntrMsk` `RW 0x0`	`DataTglErrMsk` `RW 0x0`	`FrmOvrunMsk` `RW 0x0`	`BblErrMsk` `RW 0x0`	`XactErrMsk` `RW 0x0`	`NyetMsk` `RW 0x0`	`AckMsk` `RW 0x0`	`NakMsk` `RW 0x0`	`StallMsk` `RW 0x0`	`AHBErrMsk` `RW 0x0`	`ChHltdMsk` `RW 0x0`	`XferComplMsk` `RW 0x0`
`HCTSIZ13` `0x6B0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DoPng` `RW 0x0`	`Pid` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`HCDMA13` `0x6B4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`HCDMAB13` `0x6BC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`HCDMAB` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HCDMAB` `RW 0x0`
`HCCHAR14` `0x6C0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ChEna` `RW 0x0`	`ChDis` `RW 0x0`	`OddFrm` `RW 0x0`	`DevAddr` `RW 0x0`							`EC` `RW 0x0`		`EPType` `RW 0x0`		`LSpdDev` `RW 0x0`	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EPDir` `RW 0x0`	`EPNum` `RW 0x0`				`MPS` `RW 0x0`
`HCSPLT14` `0x6C4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SpltEna` `RW 0x0`	`RESERVED` `RO 0x0`														`CompSplt` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XactPos` `RW 0x0`		`HubAddr` `RW 0x0`							`PrtAddr` `RW 0x0`
`HCINT14` `0x6C8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`DESC_LST_ROLLIntr` `RW 0x0`	`XCS_XACT_ERR` `RW 0x0`	`BNAIntr` `RW 0x0`	`DataTglErr` `RW 0x0`	`FrmOvrun` `RW 0x0`	`BblErr` `RW 0x0`	`XactErr` `RW 0x0`	`NYET` `RW 0x0`	`ACK` `RW 0x0`	`NAK` `RW 0x0`	`STALL` `RW 0x0`	`AHBErr` `RW 0x0`	`ChHltd` `RW 0x0`	`XferCompl` `RW 0x0`
`HCINTMSK14` `0x6CC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`FRM_LST_ROLLIntrMsk` `RW 0x0`	`RESERVED1` `RO 0x0`	`BNAIntrMsk` `RW 0x0`	`DataTglErrMsk` `RW 0x0`	`FrmOvrunMsk` `RW 0x0`	`BblErrMsk` `RW 0x0`	`XactErrMsk` `RW 0x0`	`NyetMsk` `RW 0x0`	`AckMsk` `RW 0x0`	`NakMsk` `RW 0x0`	`StallMsk` `RW 0x0`	`AHBErrMsk` `RW 0x0`	`ChHltdMsk` `RW 0x0`	`XferComplMsk` `RW 0x0`
`HCTSIZ14` `0x6D0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DoPng` `RW 0x0`	`Pid` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`HCDMA14` `0x6D4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`HCDMAB14` `0x6DC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`HCDMAB` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HCDMAB` `RW 0x0`
`HCCHAR15` `0x6E0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ChEna` `RW 0x0`	`ChDis` `RW 0x0`	`OddFrm` `RW 0x0`	`DevAddr` `RW 0x0`							`EC` `RW 0x0`		`EPType` `RW 0x0`		`LSpdDev` `RW 0x0`	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`EPDir` `RW 0x0`	`EPNum` `RW 0x0`				`MPS` `RW 0x0`
`HCSPLT15` `0x6E4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`SpltEna` `RW 0x0`	`RESERVED` `RO 0x0`														`CompSplt` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XactPos` `RW 0x0`		`HubAddr` `RW 0x0`							`PrtAddr` `RW 0x0`
`HCINT15` `0x6E8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`DESC_LST_ROLLIntr` `RW 0x0`	`XCS_XACT_ERR` `RW 0x0`	`BNAIntr` `RW 0x0`	`DataTglErr` `RW 0x0`	`FrmOvrun` `RW 0x0`	`BblErr` `RW 0x0`	`XactErr` `RW 0x0`	`NYET` `RW 0x0`	`ACK` `RW 0x0`	`NAK` `RW 0x0`	`STALL` `RW 0x0`	`AHBErr` `RW 0x0`	`ChHltd` `RW 0x0`	`XferCompl` `RW 0x0`
`HCINTMSK15` `0x6EC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`FRM_LST_ROLLIntrMsk` `RW 0x0`	`RESERVED1` `RO 0x0`	`BNAIntrMsk` `RW 0x0`	`DataTglErrMsk` `RW 0x0`	`FrmOvrunMsk` `RW 0x0`	`BblErrMsk` `RW 0x0`	`XactErrMsk` `RW 0x0`	`NyetMsk` `RW 0x0`	`AckMsk` `RW 0x0`	`NakMsk` `RW 0x0`	`StallMsk` `RW 0x0`	`AHBErrMsk` `RW 0x0`	`ChHltdMsk` `RW 0x0`	`XferComplMsk` `RW 0x0`
`HCTSIZ15` `0x6F0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DoPng` `RW 0x0`	`Pid` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`HCDMA15` `0x6F4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`HCDMAB15` `0x6FC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`HCDMAB` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`HCDMAB` `RW 0x0`
`DCFG` `0x800` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`ResValid` `RW 0x2`						`PerSchIntvl` `RW 0x0`		`DescDMA` `RW 0x0`	`Reserved`					`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`ErraticIntMsk` `RW 0x0`	`XCVRDLY` `RW 0x0`	`EnDevOutNak` `RW 0x0`	`PerFrInt` `RW 0x0`		`DevAddr` `RW 0x0`							`Ena32KHzSusp` `RW 0x0`	`NZStsOUTHShk` `RW 0x0`	`DevSpd` `RW 0x0`
`DCTL` `0x804` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`													`Reserved`	`EnContOnBNA` `RW 0x0`	`NakOnBble` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`IgnrFrmNum` `RW 0x0`	`GMC` `RW 0x0`		`Reserved`	`PWROnPrgDone` `RW 0x0`	`CGOUTNak` `WO 0x0`	`SGOUTNak` `WO 0x0`	`CGNPInNak` `WO 0x0`	`SGNPInNak` `WO 0x0`	`TstCtl` `RW 0x0`			`GOUTNakSts` `RO 0x0`	`GNPINNakSts` `RO 0x0`	`SftDiscon` `RW 0x1`	`RmtWkUpSig` `RW 0x0`
`DSTS` `0x808` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`								`DevLnSts` `RO 0x0`		`SOFFN` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`SOFFN` `RO 0x0`								`RESERVED1` `RO 0x0`				`ErrticErr` `RO 0x0`	`EnumSpd` `RO 0x1`		`SuspSts` `RO 0x0`
`DIEPMSK` `0x810` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`		`NAKMsk` `RW 0x0`	`Reserved`			`BNAInIntrMsk` `RW 0x0`	`TxfifoUndrnMsk` `RW 0x0`	`RESERVED1` `RO 0x0`	`INEPNakEffMsk` `RW 0x0`	`INTknEPMisMsk` `RW 0x0`	`INTknTXFEmpMsk` `RW 0x0`	`TimeOUTMsk` `RW 0x0`	`AHBErrMsk` `RW 0x0`	`EPDisbldMsk` `RW 0x0`	`XferComplMsk` `RW 0x0`
`DOEPMSK` `0x814` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`	`NYETMsk` `RW 0x0`	`NAKMsk` `RW 0x0`	`BbleErrMsk` `RW 0x0`	`Reserved`		`BnaOutIntrMsk` `RW 0x0`	`OutPktErrMsk` `RW 0x0`	`RESERVED1` `RO 0x0`	`Back2BackSETup` `RW 0x0`	`StsPhseRcvdMsk` `RW 0x0`	`OUTTknEPdisMsk` `RW 0x0`	`SetUPMsk` `RW 0x0`	`AHBErrMsk` `RW 0x0`	`EPDisbldMsk` `RW 0x0`	`XferComplMsk` `RW 0x0`
`DAINT` `0x818` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`OutEPInt15` `RO 0x0`	`OutEPInt14` `RO 0x0`	`OutEPInt13` `RO 0x0`	`OutEPInt12` `RO 0x0`	`OutEPInt11` `RO 0x0`	`OutEPInt10` `RO 0x0`	`OutEPInt9` `RO 0x0`	`OutEPInt8` `RO 0x0`	`OutEPInt7` `RO 0x0`	`OutEPInt6` `RO 0x0`	`OutEPInt5` `RO 0x0`	`OutEPInt4` `RO 0x0`	`OutEPInt3` `RO 0x0`	`OutEPInt2` `RO 0x0`	`OutEPInt1` `RO 0x0`	`OutEPInt0` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`InEpInt15` `RO 0x0`	`InEpInt14` `RO 0x0`	`InEpInt13` `RO 0x0`	`InEpInt12` `RO 0x0`	`InEpInt11` `RO 0x0`	`InEpInt10` `RO 0x0`	`InEpInt9` `RO 0x0`	`InEpInt8` `RO 0x0`	`InEpInt7` `RO 0x0`	`InEpInt6` `RO 0x0`	`InEpInt5` `RO 0x0`	`InEpInt4` `RO 0x0`	`InEpInt3` `RO 0x0`	`InEpInt2` `RO 0x0`	`InEpInt1` `RO 0x0`	`InEpInt0` `RO 0x0`
`DAINTMSK` `0x81C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`OutEPMsk15` `RW 0x0`	`OutEPMsk14` `RW 0x0`	`OutEPMsk13` `RW 0x0`	`OutEPMsk12` `RW 0x0`	`OutEPMsk11` `RW 0x0`	`OutEPMsk10` `RW 0x0`	`OutEPMsk9` `RW 0x0`	`OutEPMsk8` `RW 0x0`	`OutEPMsk7` `RW 0x0`	`OutEPMsk6` `RW 0x0`	`OutEPMsk5` `RW 0x0`	`OutEPMsk4` `RW 0x0`	`OutEPMsk3` `RW 0x0`	`OutEPMsk2` `RW 0x0`	`OutEPMsk1` `RW 0x0`	`OutEPMsk0` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`InEpMsk15` `RW 0x0`	`InEpMsk14` `RW 0x0`	`InEpMsk13` `RW 0x0`	`InEpMsk12` `RW 0x0`	`InEpMsk11` `RW 0x0`	`InEpMsk10` `RW 0x0`	`InEpMsk9` `RW 0x0`	`InEpMsk8` `RW 0x0`	`InEpMsk7` `RW 0x0`	`InEpMsk6` `RW 0x0`	`InEpMsk5` `RW 0x0`	`InEpMsk4` `RW 0x0`	`InEpMsk3` `RW 0x0`	`InEpMsk2` `RW 0x0`	`InEpMsk1` `RW 0x0`	`InEpMsk0` `RW 0x0`
`DVBUSDIS` `0x828` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DVBUSDis` `RW 0x17D7`
`DVBUSPULSE` `0x82C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`				`DVBUSPulse` `RW 0x5B8`
`DTHRCTL` `0x830` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`				`ArbPrkEn` `RW 0x1`	`RESERVED1` `RO 0x1`	`RxThrLen` `RW 0x8`									`RxThrEn` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED2` `RO 0x0`			`AHBThrRatio` `RW 0x0`		`TxThrLen` `RW 0x8`									`ISOThrEn` `RW 0x0`	`NonISOThrEn` `RW 0x0`
`DIEPEMPMSK` `0x834` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`InEpTxfEmpMsk` `RW 0x0`
`DIEPCTL0` `0x900` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`RESERVED` `RO 0x0`		`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`TxFNum` `RW 0x0`				`Stall` `RW 0x0`	`RESERVED1` `RO 0x0`	`EPType` `RO 0x0`		`NAKSts` `RO 0x0`	`RESERVED2` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RO 0x1`	`Reserved`				`RESERVED3` `RO 0x0`									`MPS` `RW 0x0`
`DIEPINT0` `0x908` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`TxfifoUndrn` `RW 0x0`	`TxFEmp` `RO 0x1`	`INEPNakEff` `RW 0x0`	`INTknEPMis` `RW 0x0`	`INTknTXFEmp` `RW 0x0`	`TimeOUT` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DIEPTSIZ0` `0x910` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`											`PktCnt` `RW 0x0`		`RESERVED1` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED1` `RO 0x0`									`XferSize` `RW 0x0`
`DIEPDMA0` `0x914` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DTXFSTS0` `0x918` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPTxFSpcAvail` `RO 0x0`
`DIEPDMAB0` `0x91C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DIEPCTL1` `0x920` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`TxFNum` `RW 0x0`				`Stall` `RW 0x0`	`Reserved`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DIEPINT1` `0x928` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`TxfifoUndrn` `RW 0x0`	`TxFEmp` `RO 0x1`	`INEPNakEff` `RW 0x0`	`INTknEPMis` `RW 0x0`	`INTknTXFEmp` `RW 0x0`	`TimeOUT` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DIEPTSIZ1` `0x930` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`MC` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DIEPDMA1` `0x934` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DTXFSTS1` `0x938` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPTxFSpcAvail` `RO 0x0`
`DIEPDMAB1` `0x93C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DIEPCTL2` `0x940` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`TxFNum` `RW 0x0`				`Stall` `RW 0x0`	`Reserved`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DIEPINT2` `0x948` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`TxfifoUndrn` `RW 0x0`	`TxFEmp` `RO 0x1`	`INEPNakEff` `RW 0x0`	`INTknEPMis` `RW 0x0`	`INTknTXFEmp` `RW 0x0`	`TimeOUT` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DIEPTSIZ2` `0x950` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`MC` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DIEPDMA2` `0x954` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DTXFSTS2` `0x958` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPTxFSpcAvail` `RO 0x0`
`DIEPDMAB2` `0x95C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DIEPCTL3` `0x960` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`TxFNum` `RW 0x0`				`Stall` `RW 0x0`	`Reserved`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DIEPINT3` `0x968` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`TxfifoUndrn` `RW 0x0`	`TxFEmp` `RO 0x1`	`INEPNakEff` `RW 0x0`	`INTknEPMis` `RW 0x0`	`INTknTXFEmp` `RW 0x0`	`TimeOUT` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DIEPTSIZ3` `0x970` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`MC` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DIEPDMA3` `0x974` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DTXFSTS3` `0x978` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPTxFSpcAvail` `RO 0x0`
`DIEPDMAB3` `0x97C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DIEPCTL4` `0x980` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`TxFNum` `RW 0x0`				`Stall` `RW 0x0`	`Reserved`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DIEPINT4` `0x988` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`TxfifoUndrn` `RW 0x0`	`TxFEmp` `RO 0x1`	`INEPNakEff` `RW 0x0`	`INTknEPMis` `RW 0x0`	`INTknTXFEmp` `RW 0x0`	`TimeOUT` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DIEPTSIZ4` `0x990` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`MC` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DIEPDMA4` `0x994` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DTXFSTS4` `0x998` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPTxFSpcAvail` `RO 0x0`
`DIEPDMAB4` `0x99C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DIEPCTL5` `0x9A0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`TxFNum` `RW 0x0`				`Stall` `RW 0x0`	`Reserved`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DIEPINT5` `0x9A8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`TxfifoUndrn` `RW 0x0`	`TxFEmp` `RO 0x1`	`INEPNakEff` `RW 0x0`	`INTknEPMis` `RW 0x0`	`INTknTXFEmp` `RW 0x0`	`TimeOUT` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DIEPTSIZ5` `0x9B0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`MC` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DIEPDMA5` `0x9B4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DTXFSTS5` `0x9B8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPTxFSpcAvail` `RO 0x0`
`DIEPDMAB5` `0x9BC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DIEPCTL6` `0x9C0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`TxFNum` `RW 0x0`				`Stall` `RW 0x0`	`Reserved`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DIEPINT6` `0x9C8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`TxfifoUndrn` `RW 0x0`	`TxFEmp` `RO 0x1`	`INEPNakEff` `RW 0x0`	`INTknEPMis` `RW 0x0`	`INTknTXFEmp` `RW 0x0`	`TimeOUT` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DIEPTSIZ6` `0x9D0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`MC` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DIEPDMA6` `0x9D4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DTXFSTS6` `0x9D8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPTxFSpcAvail` `RO 0x0`
`DIEPDMAB6` `0x9DC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DIEPCTL7` `0x9E0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`TxFNum` `RW 0x0`				`Stall` `RW 0x0`	`Reserved`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DIEPINT7` `0x9E8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`TxfifoUndrn` `RW 0x0`	`TxFEmp` `RO 0x1`	`INEPNakEff` `RW 0x0`	`INTknEPMis` `RW 0x0`	`INTknTXFEmp` `RW 0x0`	`TimeOUT` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DIEPTSIZ7` `0x9F0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`MC` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DIEPDMA7` `0x9F4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DTXFSTS7` `0x9F8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPTxFSpcAvail` `RO 0x0`
`DIEPDMAB7` `0x9FC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DIEPCTL8` `0xA00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`TxFNum` `RW 0x0`				`Stall` `RW 0x0`	`Reserved`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DIEPINT8` `0xA08` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`TxfifoUndrn` `RW 0x0`	`TxFEmp` `RO 0x1`	`INEPNakEff` `RW 0x0`	`INTknEPMis` `RW 0x0`	`INTknTXFEmp` `RW 0x0`	`TimeOUT` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DIEPTSIZ8` `0xA10` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`MC` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DIEPDMA8` `0xA14` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DTXFSTS8` `0xA18` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPTxFSpcAvail` `RO 0x0`
`DIEPDMAB8` `0xA1C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DIEPCTL9` `0xA20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`TxFNum` `RW 0x0`				`Stall` `RW 0x0`	`Reserved`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DIEPINT9` `0xA28` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`TxfifoUndrn` `RW 0x0`	`TxFEmp` `RO 0x1`	`INEPNakEff` `RW 0x0`	`INTknEPMis` `RW 0x0`	`INTknTXFEmp` `RW 0x0`	`TimeOUT` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DIEPTSIZ9` `0xA30` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`MC` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DIEPDMA9` `0xA34` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DTXFSTS9` `0xA38` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPTxFSpcAvail` `RO 0x0`
`DIEPDMAB9` `0xA3C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DIEPCTL10` `0xA40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`TxFNum` `RW 0x0`				`Stall` `RW 0x0`	`Reserved`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DIEPINT10` `0xA48` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`TxfifoUndrn` `RW 0x0`	`TxFEmp` `RO 0x1`	`INEPNakEff` `RW 0x0`	`INTknEPMis` `RW 0x0`	`INTknTXFEmp` `RW 0x0`	`TimeOUT` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DIEPTSIZ10` `0xA50` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`MC` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DIEPDMA10` `0xA54` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DTXFSTS10` `0xA58` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPTxFSpcAvail` `RO 0x0`
`DIEPDMAB10` `0xA5C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DIEPCTL11` `0xA60` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`TxFNum` `RW 0x0`				`Stall` `RW 0x0`	`Reserved`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DIEPINT11` `0xA68` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`TxfifoUndrn` `RW 0x0`	`TxFEmp` `RO 0x1`	`INEPNakEff` `RW 0x0`	`INTknEPMis` `RW 0x0`	`INTknTXFEmp` `RW 0x0`	`TimeOUT` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DIEPTSIZ11` `0xA70` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`MC` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DIEPDMA11` `0xA74` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DTXFSTS11` `0xA78` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPTxFSpcAvail` `RO 0x0`
`DIEPDMAB11` `0xA7C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DIEPCTL12` `0xA80` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`TxFNum` `RW 0x0`				`Stall` `RW 0x0`	`Reserved`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DIEPINT12` `0xA88` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`TxfifoUndrn` `RW 0x0`	`TxFEmp` `RO 0x1`	`INEPNakEff` `RW 0x0`	`INTknEPMis` `RW 0x0`	`INTknTXFEmp` `RW 0x0`	`TimeOUT` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DIEPTSIZ12` `0xA90` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`MC` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DIEPDMA12` `0xA94` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DTXFSTS12` `0xA98` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPTxFSpcAvail` `RO 0x0`
`DIEPDMAB12` `0xA9C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DIEPCTL13` `0xAA0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`TxFNum` `RW 0x0`				`Stall` `RW 0x0`	`Reserved`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DIEPINT13` `0xAA8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`TxfifoUndrn` `RW 0x0`	`TxFEmp` `RO 0x1`	`INEPNakEff` `RW 0x0`	`INTknEPMis` `RW 0x0`	`INTknTXFEmp` `RW 0x0`	`TimeOUT` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DIEPTSIZ13` `0xAB0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`MC` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DIEPDMA13` `0xAB4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DTXFSTS13` `0xAB8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPTxFSpcAvail` `RO 0x0`
`DIEPDMAB13` `0xABC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DIEPCTL14` `0xAC0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`TxFNum` `RW 0x0`				`Stall` `RW 0x0`	`Reserved`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DIEPINT14` `0xAC8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`TxfifoUndrn` `RW 0x0`	`TxFEmp` `RO 0x1`	`INEPNakEff` `RW 0x0`	`INTknEPMis` `RW 0x0`	`INTknTXFEmp` `RW 0x0`	`TimeOUT` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DIEPTSIZ14` `0xAD0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`MC` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DIEPDMA14` `0xAD4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DTXFSTS14` `0xAD8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPTxFSpcAvail` `RO 0x0`
`DIEPDMAB14` `0xADC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DIEPCTL15` `0xAE0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`TxFNum` `RW 0x0`				`Stall` `RW 0x0`	`Reserved`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DIEPINT15` `0xAE8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED` `RO 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`TxfifoUndrn` `RW 0x0`	`TxFEmp` `RO 0x1`	`INEPNakEff` `RW 0x0`	`INTknEPMis` `RW 0x0`	`INTknTXFEmp` `RW 0x0`	`TimeOUT` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DIEPTSIZ15` `0xAF0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`MC` `RW 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DIEPDMA15` `0xAF4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DTXFSTS15` `0xAF8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`INEPTxFSpcAvail` `RO 0x0`
`DIEPDMAB15` `0xAFC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DOEPCTL0` `0xB00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RO 0x0`	`RESERVED` `RO 0x0`		`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`RESERVED1` `RO 0x0`				`Stall` `RW 0x0`	`Snp` `RW 0x0`	`EPType` `RO 0x0`		`NAKSts` `RO 0x0`	`RESERVED2` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RO 0x1`	`RESERVED3` `RO 0x0`													`MPS` `RO 0x0`
`DOEPINT0` `0xB08` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`StupPktRcvd` `RW 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`OutPktErr` `RW 0x0`	`Reserved`	`Back2BackSETup` `RW 0x0`	`StsPhseRcvd` `RW 0x0`	`OUTTknEPdis` `RW 0x0`	`SetUp` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DOEPTSIZ0` `0xB10` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`SUPCnt` `RW 0x0`		`RESERVED1` `RO 0x0`									`PktCnt` `RW 0x0`	`RESERVED2` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`RESERVED2` `RO 0x0`									`XferSize` `RW 0x0`
`DOEPDMA0` `0xB14` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DOEPDMAB0` `0xB1C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DOEPCTL1` `0xB20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`Reserved`				`Stall` `RW 0x0`	`Snp` `RW 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DOEPINT1` `0xB28` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`StupPktRcvd` `RW 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`OutPktErr` `RW 0x0`	`Reserved`	`Back2BackSETup` `RW 0x0`	`StsPhseRcvd` `RW 0x0`	`OUTTknEPdis` `RW 0x0`	`SetUp` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DOEPTSIZ1` `0xB30` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`RxDPID` `RO 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DOEPDMA1` `0xB34` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DOEPDMAB1` `0xB3C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DOEPCTL2` `0xB40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`Reserved`				`Stall` `RW 0x0`	`Snp` `RW 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DOEPINT2` `0xB48` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`StupPktRcvd` `RW 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`OutPktErr` `RW 0x0`	`Reserved`	`Back2BackSETup` `RW 0x0`	`StsPhseRcvd` `RW 0x0`	`OUTTknEPdis` `RW 0x0`	`SetUp` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DOEPTSIZ2` `0xB50` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`RxDPID` `RO 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DOEPDMA2` `0xB54` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DOEPDMAB2` `0xB5C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DOEPCTL3` `0xB60` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`Reserved`				`Stall` `RW 0x0`	`Snp` `RW 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DOEPINT3` `0xB68` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`StupPktRcvd` `RW 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`OutPktErr` `RW 0x0`	`Reserved`	`Back2BackSETup` `RW 0x0`	`StsPhseRcvd` `RW 0x0`	`OUTTknEPdis` `RW 0x0`	`SetUp` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DOEPTSIZ3` `0xB70` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`RxDPID` `RO 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DOEPDMA3` `0xB74` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DOEPDMAB3` `0xB7C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DOEPCTL4` `0xB80` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`Reserved`				`Stall` `RW 0x0`	`Snp` `RW 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DOEPINT4` `0xB88` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`StupPktRcvd` `RW 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`OutPktErr` `RW 0x0`	`Reserved`	`Back2BackSETup` `RW 0x0`	`StsPhseRcvd` `RW 0x0`	`OUTTknEPdis` `RW 0x0`	`SetUp` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DOEPTSIZ4` `0xB90` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`RxDPID` `RO 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DOEPDMA4` `0xB94` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DOEPDMAB4` `0xB9C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DOEPCTL5` `0xBA0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`Reserved`				`Stall` `RW 0x0`	`Snp` `RW 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DOEPINT5` `0xBA8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`StupPktRcvd` `RW 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`OutPktErr` `RW 0x0`	`Reserved`	`Back2BackSETup` `RW 0x0`	`StsPhseRcvd` `RW 0x0`	`OUTTknEPdis` `RW 0x0`	`SetUp` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DOEPTSIZ5` `0xBB0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`RxDPID` `RO 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DOEPDMA5` `0xBB4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DOEPDMAB5` `0xBBC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DOEPCTL6` `0xBC0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`Reserved`				`Stall` `RW 0x0`	`Snp` `RW 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DOEPINT6` `0xBC8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`StupPktRcvd` `RW 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`OutPktErr` `RW 0x0`	`Reserved`	`Back2BackSETup` `RW 0x0`	`StsPhseRcvd` `RW 0x0`	`OUTTknEPdis` `RW 0x0`	`SetUp` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DOEPTSIZ6` `0xBD0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`RxDPID` `RO 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DOEPDMA6` `0xBD4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DOEPDMAB6` `0xBDC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DOEPCTL7` `0xBE0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`Reserved`				`Stall` `RW 0x0`	`Snp` `RW 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DOEPINT7` `0xBE8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`StupPktRcvd` `RW 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`OutPktErr` `RW 0x0`	`Reserved`	`Back2BackSETup` `RW 0x0`	`StsPhseRcvd` `RW 0x0`	`OUTTknEPdis` `RW 0x0`	`SetUp` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DOEPTSIZ7` `0xBF0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`RxDPID` `RO 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DOEPDMA7` `0xBF4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DOEPDMAB7` `0xBFC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DOEPCTL8` `0xC00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`Reserved`				`Stall` `RW 0x0`	`Snp` `RW 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DOEPINT8` `0xC08` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`StupPktRcvd` `RW 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`OutPktErr` `RW 0x0`	`Reserved`	`Back2BackSETup` `RW 0x0`	`StsPhseRcvd` `RW 0x0`	`OUTTknEPdis` `RW 0x0`	`SetUp` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DOEPTSIZ8` `0xC10` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`RxDPID` `RO 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DOEPDMA8` `0xC14` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DOEPDMAB8` `0xC1C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DOEPCTL9` `0xC20` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`Reserved`				`Stall` `RW 0x0`	`Snp` `RW 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DOEPINT9` `0xC28` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`StupPktRcvd` `RW 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`OutPktErr` `RW 0x0`	`Reserved`	`Back2BackSETup` `RW 0x0`	`StsPhseRcvd` `RW 0x0`	`OUTTknEPdis` `RW 0x0`	`SetUp` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DOEPTSIZ9` `0xC30` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`RxDPID` `RO 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DOEPDMA9` `0xC34` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DOEPDMAB9` `0xC3C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DOEPCTL10` `0xC40` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`Reserved`				`Stall` `RW 0x0`	`Snp` `RW 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DOEPINT10` `0xC48` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`StupPktRcvd` `RW 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`OutPktErr` `RW 0x0`	`Reserved`	`Back2BackSETup` `RW 0x0`	`StsPhseRcvd` `RW 0x0`	`OUTTknEPdis` `RW 0x0`	`SetUp` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DOEPTSIZ10` `0xC50` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`RxDPID` `RO 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DOEPDMA10` `0xC54` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DOEPDMAB10` `0xC5C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DOEPCTL11` `0xC60` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`Reserved`				`Stall` `RW 0x0`	`Snp` `RW 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DOEPINT11` `0xC68` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`StupPktRcvd` `RW 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`OutPktErr` `RW 0x0`	`Reserved`	`Back2BackSETup` `RW 0x0`	`StsPhseRcvd` `RW 0x0`	`OUTTknEPdis` `RW 0x0`	`SetUp` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DOEPTSIZ11` `0xC70` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`RxDPID` `RO 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DOEPDMA11` `0xC74` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DOEPDMAB11` `0xC7C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DOEPCTL12` `0xC80` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`Reserved`				`Stall` `RW 0x0`	`Snp` `RW 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DOEPINT12` `0xC88` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`StupPktRcvd` `RW 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`OutPktErr` `RW 0x0`	`Reserved`	`Back2BackSETup` `RW 0x0`	`StsPhseRcvd` `RW 0x0`	`OUTTknEPdis` `RW 0x0`	`SetUp` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DOEPTSIZ12` `0xC90` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`RxDPID` `RO 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DOEPDMA12` `0xC94` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DOEPDMAB12` `0xC9C` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DOEPCTL13` `0xCA0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`Reserved`				`Stall` `RW 0x0`	`Snp` `RW 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DOEPINT13` `0xCA8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`StupPktRcvd` `RW 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`OutPktErr` `RW 0x0`	`Reserved`	`Back2BackSETup` `RW 0x0`	`StsPhseRcvd` `RW 0x0`	`OUTTknEPdis` `RW 0x0`	`SetUp` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DOEPTSIZ13` `0xCB0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`RxDPID` `RO 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DOEPDMA13` `0xCB4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DOEPDMAB13` `0xCBC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DOEPCTL14` `0xCC0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`Reserved`				`Stall` `RW 0x0`	`Snp` `RW 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DOEPINT14` `0xCC8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`StupPktRcvd` `RW 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`OutPktErr` `RW 0x0`	`Reserved`	`Back2BackSETup` `RW 0x0`	`StsPhseRcvd` `RW 0x0`	`OUTTknEPdis` `RW 0x0`	`SetUp` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DOEPTSIZ14` `0xCD0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`RxDPID` `RO 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DOEPDMA14` `0xCD4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DOEPDMAB14` `0xCDC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`DOEPCTL15` `0xCE0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`EPEna` `RW 0x0`	`EPDis` `RW 0x0`	`SetD1PID` `WO 0x0`	`SetD0PID` `WO 0x0`	`SNAK` `WO 0x0`	`CNAK` `WO 0x0`	`Reserved`				`Stall` `RW 0x0`	`Snp` `RW 0x0`	`EPType` `RW 0x0`		`NAKSts` `RO 0x0`	`DPID` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`USBActEP` `RW 0x0`	`Reserved`				`MPS` `RW 0x0`
`DOEPINT15` `0xCE8` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`StupPktRcvd` `RW 0x0`	`NYETIntrpt` `RW 0x0`	`NAKIntrpt` `RW 0x0`	`BbleErr` `RW 0x0`	`PktDrpSts` `RW 0x0`	`Reserved`	`BNAIntr` `RW 0x0`	`OutPktErr` `RW 0x0`	`Reserved`	`Back2BackSETup` `RW 0x0`	`StsPhseRcvd` `RW 0x0`	`OUTTknEPdis` `RW 0x0`	`SetUp` `RW 0x0`	`AHBErr` `RW 0x0`	`EPDisbld` `RW 0x0`	`XferCompl` `RW 0x0`
`DOEPTSIZ15` `0xCF0` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`RESERVED` `RO 0x0`	`RxDPID` `RO 0x0`		`PktCnt` `RW 0x0`										`XferSize` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`XferSize` `RW 0x0`
`DOEPDMA15` `0xCF4` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMAAddr` `RW 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMAAddr` `RW 0x0`
`DOEPDMAB15` `0xCFC` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`DMABufferAddr` `RO 0x0`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`DMABufferAddr` `RO 0x0`
`PCGCCTL` `0xE00` 32-bit	31	30	29	28	27	26	25	24	23	22	21	20	19	18	17	16
	`Reserved`
	15	14	13	12	11	10	9	8	7	6	5	4	3	2	1	0
	`Reserved`								`L1Suspended` `RO 0x0`	`PhySleep` `RO 0x0`	`Reserved`		`RstPdwnModule` `RW 0x0`	`Reserved`		`StopPclk` `RW 0x0`