I2C_emac Summary

DW_apb_i2c address block
Module Instance Base Address
i_i2c_emac_0_DW_apb_i2c_addr_block1 0xFFC02A00
i_i2c_emac_1_DW_apb_i2c_addr_block1 0xFFC02B00
i_i2c_emac_2_DW_apb_i2c_addr_block1 0xFFC02C00
Register

Address Offset

Bit Fields
i_i2c_emac_0_DW_apb_i2c_addr_block1

IC_CON

0x0

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_CON_2

RO 0x0

RSVD_SMBUS_PERSISTENT_SLV_ADDR_EN

RO 0x0

RSVD_SMBUS_ARP_EN

RO 0x0

RSVD_SMBUS_SLAVE_QUICK_EN

RO 0x0

RSVD_OPTIONAL_SAR_CTRL

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_CON_1

RO 0x0

RSVD_BUS_CLEAR_FEATURE_CTRL

RO 0x0

STOP_DET_IF_MASTER_ACTIVE

RO 0x0

RX_FIFO_FULL_HLD_CTRL

RO 0x0

TX_EMPTY_CTRL

RW 0x0

STOP_DET_IFADDRESSED

RW 0x0

IC_SLAVE_DISABLE

RW 0x1

IC_RESTART_EN

RW 0x1

IC_10BITADDR_MASTER_rd_only

RO 0x1

IC_10BITADDR_SLAVE

RW 0x1

SPEED

RW 0x2

MASTER_MODE

RW 0x1

IC_TAR

0x4

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_TAR_2

RO 0x0

RSVD_SMBUS_QUICK_CMD

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_TAR_1

RO 0x0

RSVD_DEVICE_ID

RO 0x0

IC_10BITADDR_MASTER

RW 0x1

SPECIAL

RW 0x0

GC_OR_START

RW 0x0

IC_TAR

RW 0x55

IC_SAR

0x8

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_SAR

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_SAR

RO 0x0

IC_SAR

RW 0x55

IC_DATA_CMD

0x10

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_DATA_CMD

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_DATA_CMD

RO 0x0

FIRST_DATA_BYTE

RO 0x0

RESTART

WO 0x0

STOP

WO 0x0

CMD

WO 0x0

DAT

RW 0x0

IC_SS_SCL_HCNT

0x14

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_SS_SCL_HIGH_COUNT

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

IC_SS_SCL_HCNT

RW 0x1F4

IC_SS_SCL_LCNT

0x18

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_SS_SCL_LOW_COUNT

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

IC_SS_SCL_LCNT

RW 0x24C

IC_FS_SCL_HCNT

0x1C

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_FS_SCL_HCNT

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

IC_FS_SCL_HCNT

RW 0x4B

IC_FS_SCL_LCNT

0x20

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_FS_SCL_LCNT

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

IC_FS_SCL_LCNT

RW 0xA3

IC_INTR_STAT

0x2C

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_INTR_STAT

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_INTR_STAT

RO 0x0

RSVD_R_SCL_STUCK_AT_LOW

RO 0x0

R_MASTER_ON_HOLD

RO 0x0

R_RESTART_DET

RO 0x0

R_GEN_CALL

RO 0x0

R_START_DET

RO 0x0

R_STOP_DET

RO 0x0

R_ACTIVITY

RO 0x0

R_RX_DONE

RO 0x0

R_TX_ABRT

RO 0x0

R_RD_REQ

RO 0x0

R_TX_EMPTY

RO 0x0

R_TX_OVER

RO 0x0

R_RX_FULL

RO 0x0

R_RX_OVER

RO 0x0

R_RX_UNDER

RO 0x0

IC_INTR_MASK

0x30

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_INTR_STAT

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_INTR_STAT

RO 0x0

RSVD_M_SCL_STUCK_AT_LOW

RO 0x0

M_MASTER_ON_HOLD

RW 0x0

M_RESTART_DET

RW 0x0

M_GEN_CALL

RW 0x1

M_START_DET

RW 0x0

M_STOP_DET

RW 0x0

M_ACTIVITY

RW 0x0

M_RX_DONE

RW 0x1

M_TX_ABRT

RW 0x1

M_RD_REQ

RW 0x1

M_TX_EMPTY

RW 0x1

M_TX_OVER

RW 0x1

M_RX_FULL

RW 0x1

M_RX_OVER

RW 0x1

M_RX_UNDER

RW 0x1

IC_RAW_INTR_STAT

0x34

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_RAW_INTR_STAT

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_RAW_INTR_STAT

RO 0x0

RSVD_SCL_STUCK_AT_LOW

RO 0x0

MASTER_ON_HOLD

RO 0x0

RESTART_DET

RO 0x0

GEN_CALL

RO 0x0

START_DET

RO 0x0

STOP_DET

RO 0x0

RAW_INTR_ACTIVITY

RO 0x0

RX_DONE

RO 0x0

TX_ABRT

RO 0x0

RD_REQ

RO 0x0

TX_EMPTY

RO 0x0

TX_OVER

RO 0x0

RX_FULL

RO 0x0

RX_OVER

RO 0x0

RX_UNDER

RO 0x0

IC_RX_TL

0x38

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_RX_TL

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_RX_TL

RO 0x0

RX_TL

RW 0x0

IC_TX_TL

0x3C

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_TX_TL

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_TX_TL

RO 0x0

TX_TL

RW 0x0

IC_CLR_INTR

0x40

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_CLR_INTR

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_CLR_INTR

RO 0x0

CLR_INTR

RO 0x0

IC_CLR_RX_UNDER

0x44

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_CLR_RX_UNDER

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_CLR_RX_UNDER

RO 0x0

CLR_RX_UNDER

RO 0x0

IC_CLR_RX_OVER

0x48

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_CLR_RX_OVER

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_CLR_RX_OVER

RO 0x0

CLR_RX_OVER

RO 0x0

IC_CLR_TX_OVER

0x4C

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_CLR_TX_OVER

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_CLR_TX_OVER

RO 0x0

CLR_TX_OVER

RO 0x0

IC_CLR_RD_REQ

0x50

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_CLR_RD_REQ

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_CLR_RD_REQ

RO 0x0

CLR_RD_REQ

RO 0x0

IC_CLR_TX_ABRT

0x54

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_CLR_TX_ABRT

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_CLR_TX_ABRT

RO 0x0

CLR_TX_ABRT

RO 0x0

IC_CLR_RX_DONE

0x58

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_CLR_RX_DONE

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_CLR_RX_DONE

RO 0x0

CLR_RX_DONE

RO 0x0

IC_CLR_ACTIVITY

0x5C

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_CLR_ACTIVITY

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_CLR_ACTIVITY

RO 0x0

CLR_ACTIVITY

RO 0x0

IC_CLR_STOP_DET

0x60

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_CLR_STOP_DET

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_CLR_STOP_DET

RO 0x0

CLR_STOP_DET

RO 0x0

IC_CLR_START_DET

0x64

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_CLR_START_DET

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_CLR_START_DET

RO 0x0

CLR_START_DET

RO 0x0

IC_CLR_GEN_CALL

0x68

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_CLR_GEN_CALL

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_CLR_GEN_CALL

RO 0x0

CLR_GEN_CALL

RO 0x0

IC_ENABLE

0x6C

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_ENABLE_2

RO 0x0

RSVD_SMBUS_ALERT_EN

RO 0x0

RSVD_SMBUS_SUSPEND_EN

RO 0x0

RSVD_SMBUS_CLK_RESET

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_ENABLE_1

RO 0x0

RSVD_SDA_STUCK_RECOVERY_ENABLE

RO 0x0

TX_CMD_BLOCK

RW 0x0

ABORT

RW 0x0

ENABLE

RW 0x0

IC_STATUS

0x70

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_STATUS_2

RO 0x0

RSVD_SMBUS_ALERT_STATUS

RO 0x0

RSVD_SMBUS_SUSPEND_STATUS

RO 0x0

RSVD_SMBUS_SLAVE_ADDR_RESOLVED

RO 0x0

RSVD_SMBUS_SLAVE_ADDR_VALID

RO 0x0

RSVD_SMBUS_QUICK_CMD_BIT

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_STATUS_1

RO 0x0

RSVD_SDA_STUCK_NOT_RECOVERED

RO 0x0

RSVD_SLV_HOLD_RX_FIFO_FULL

RO 0x0

RSVD_SLV_HOLD_TX_FIFO_EMPTY

RO 0x0

RSVD_MST_HOLD_RX_FIFO_FULL

RO 0x0

RSVD_MST_HOLD_TX_FIFO_EMPTY

RO 0x0

SLV_ACTIVITY

RO 0x0

MST_ACTIVITY

RO 0x0

RFF

RO 0x0

RFNE

RO 0x0

TFE

RO 0x1

TFNF

RO 0x1

IC_STATUS_ACTIVITY

RO 0x0

IC_TXFLR

0x74

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_TXFLR

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_TXFLR

RO 0x0

TXFLR

RO 0x0

IC_RXFLR

0x78

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_RXFLR

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_RXFLR

RO 0x0

RXFLR

RO 0x0

IC_SDA_HOLD

0x7C

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_SDA_HOLD

RO 0x0

IC_SDA_RX_HOLD

RW 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

IC_SDA_TX_HOLD

RW 0x1

IC_TX_ABRT_SOURCE

0x80

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

TX_FLUSH_CNT

RO 0x0

RSVD_IC_TX_ABRT_SOURCE

RO 0x0

RSVD_ABRT_DEVICE_WRITE

RO 0x0

RSVD_ABRT_SDA_STUCK_AT_LOW

RO 0x0

ABRT_USER_ABRT

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

ABRT_SLVRD_INTX

RO 0x0

ABRT_SLV_ARBLOST

RO 0x0

ABRT_SLVFLUSH_TXFIFO

RO 0x0

ARB_LOST

RO 0x0

ABRT_MASTER_DIS

RO 0x0

ABRT_10B_RD_NORSTRT

RO 0x0

ABRT_SBYTE_NORSTRT

RO 0x0

ABRT_HS_NORSTRT

RO 0x0

ABRT_SBYTE_ACKDET

RO 0x0

ABRT_HS_ACKDET

RO 0x0

ABRT_GCALL_READ

RO 0x0

ABRT_GCALL_NOACK

RO 0x0

ABRT_TXDATA_NOACK

RO 0x0

ABRT_10ADDR2_NOACK

RO 0x0

ABRT_10ADDR1_NOACK

RO 0x0

ABRT_7B_ADDR_NOACK

RO 0x0

IC_SLV_DATA_NACK_ONLY

0x84

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_SLV_DATA_NACK_ONLY

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_SLV_DATA_NACK_ONLY

RO 0x0

NACK

RW 0x0

IC_DMA_CR

0x88

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_DMA_CR_2_31

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_DMA_CR_2_31

RO 0x0

TDMAE

RW 0x0

RDMAE

RW 0x0

IC_DMA_TDLR

0x8C

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_DMA_TDLR

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_DMA_TDLR

RO 0x0

DMATDL

RW 0x0

IC_DMA_RDLR

0x90

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_DMA_RDLR

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_DMA_RDLR

RO 0x0

DMARDL

RW 0x0

IC_SDA_SETUP

0x94

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_SDA_SETUP

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_SDA_SETUP

RO 0x0

SDA_SETUP

RW 0x64

IC_ACK_GENERAL_CALL

0x98

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_ACK_GEN_1_31

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_ACK_GEN_1_31

RO 0x0

ACK_GEN_CALL

RW 0x1

IC_ENABLE_STATUS

0x9C

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_ENABLE_STATUS

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_ENABLE_STATUS

RO 0x0

SLV_RX_DATA_LOST

RO 0x0

SLV_DISABLED_WHILE_BUSY

RO 0x0

IC_EN

RO 0x0

IC_FS_SPKLEN

0xA0

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_FS_SPKLEN

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_FS_SPKLEN

RO 0x0

IC_FS_SPKLEN

RW 0x2

IC_CLR_RESTART_DET

0xA8

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_CLR_RESTART_DET

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_CLR_RESTART_DET

RO 0x0

CLR_RESTART_DET

RO 0x0

IC_COMP_PARAM_1

0xF4

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_COMP_PARAM_1

RO 0x0

TX_BUFFER_DEPTH

RO 0x3F

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RX_BUFFER_DEPTH

RO 0x3F

ADD_ENCODED_PARAMS

RO 0x1

HAS_DMA

RO 0x1

INTR_IO

RO 0x1

HC_COUNT_VALUES

RO 0x0

MAX_SPEED_MODE

RO 0x2

APB_DATA_WIDTH

RO 0x2

IC_COMP_VERSION

0xF8

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

IC_COMP_VERSION

RO 0x3230302A

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

IC_COMP_VERSION

RO 0x3230302A

IC_COMP_TYPE

0xFC

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

IC_COMP_TYPE

RO 0x44570140

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

IC_COMP_TYPE

RO 0x44570140

i_i2c_emac_1_DW_apb_i2c_addr_block1

IC_CON

0x0

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_CON_2

RO 0x0

RSVD_SMBUS_PERSISTENT_SLV_ADDR_EN

RO 0x0

RSVD_SMBUS_ARP_EN

RO 0x0

RSVD_SMBUS_SLAVE_QUICK_EN

RO 0x0

RSVD_OPTIONAL_SAR_CTRL

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_CON_1

RO 0x0

RSVD_BUS_CLEAR_FEATURE_CTRL

RO 0x0

STOP_DET_IF_MASTER_ACTIVE

RO 0x0

RX_FIFO_FULL_HLD_CTRL

RO 0x0

TX_EMPTY_CTRL

RW 0x0

STOP_DET_IFADDRESSED

RW 0x0

IC_SLAVE_DISABLE

RW 0x1

IC_RESTART_EN

RW 0x1

IC_10BITADDR_MASTER_rd_only

RO 0x1

IC_10BITADDR_SLAVE

RW 0x1

SPEED

RW 0x2

MASTER_MODE

RW 0x1

IC_TAR

0x4

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_TAR_2

RO 0x0

RSVD_SMBUS_QUICK_CMD

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_TAR_1

RO 0x0

RSVD_DEVICE_ID

RO 0x0

IC_10BITADDR_MASTER

RW 0x1

SPECIAL

RW 0x0

GC_OR_START

RW 0x0

IC_TAR

RW 0x55

IC_SAR

0x8

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_SAR

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_SAR

RO 0x0

IC_SAR

RW 0x55

IC_DATA_CMD

0x10

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_DATA_CMD

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_DATA_CMD

RO 0x0

FIRST_DATA_BYTE

RO 0x0

RESTART

WO 0x0

STOP

WO 0x0

CMD

WO 0x0

DAT

RW 0x0

IC_SS_SCL_HCNT

0x14

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_SS_SCL_HIGH_COUNT

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

IC_SS_SCL_HCNT

RW 0x1F4

IC_SS_SCL_LCNT

0x18

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_SS_SCL_LOW_COUNT

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

IC_SS_SCL_LCNT

RW 0x24C

IC_FS_SCL_HCNT

0x1C

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_FS_SCL_HCNT

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

IC_FS_SCL_HCNT

RW 0x4B

IC_FS_SCL_LCNT

0x20

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_FS_SCL_LCNT

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

IC_FS_SCL_LCNT

RW 0xA3

IC_INTR_STAT

0x2C

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_INTR_STAT

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_INTR_STAT

RO 0x0

RSVD_R_SCL_STUCK_AT_LOW

RO 0x0

R_MASTER_ON_HOLD

RO 0x0

R_RESTART_DET

RO 0x0

R_GEN_CALL

RO 0x0

R_START_DET

RO 0x0

R_STOP_DET

RO 0x0

R_ACTIVITY

RO 0x0

R_RX_DONE

RO 0x0

R_TX_ABRT

RO 0x0

R_RD_REQ

RO 0x0

R_TX_EMPTY

RO 0x0

R_TX_OVER

RO 0x0

R_RX_FULL

RO 0x0

R_RX_OVER

RO 0x0

R_RX_UNDER

RO 0x0

IC_INTR_MASK

0x30

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_INTR_STAT

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_INTR_STAT

RO 0x0

RSVD_M_SCL_STUCK_AT_LOW

RO 0x0

M_MASTER_ON_HOLD

RW 0x0

M_RESTART_DET

RW 0x0

M_GEN_CALL

RW 0x1

M_START_DET

RW 0x0

M_STOP_DET

RW 0x0

M_ACTIVITY

RW 0x0

M_RX_DONE

RW 0x1

M_TX_ABRT

RW 0x1

M_RD_REQ

RW 0x1

M_TX_EMPTY

RW 0x1

M_TX_OVER

RW 0x1

M_RX_FULL

RW 0x1

M_RX_OVER

RW 0x1

M_RX_UNDER

RW 0x1

IC_RAW_INTR_STAT

0x34

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_RAW_INTR_STAT

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_RAW_INTR_STAT

RO 0x0

RSVD_SCL_STUCK_AT_LOW

RO 0x0

MASTER_ON_HOLD

RO 0x0

RESTART_DET

RO 0x0

GEN_CALL

RO 0x0

START_DET

RO 0x0

STOP_DET

RO 0x0

RAW_INTR_ACTIVITY

RO 0x0

RX_DONE

RO 0x0

TX_ABRT

RO 0x0

RD_REQ

RO 0x0

TX_EMPTY

RO 0x0

TX_OVER

RO 0x0

RX_FULL

RO 0x0

RX_OVER

RO 0x0

RX_UNDER

RO 0x0

IC_RX_TL

0x38

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_RX_TL

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_RX_TL

RO 0x0

RX_TL

RW 0x0

IC_TX_TL

0x3C

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_TX_TL

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_TX_TL

RO 0x0

TX_TL

RW 0x0

IC_CLR_INTR

0x40

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_CLR_INTR

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_CLR_INTR

RO 0x0

CLR_INTR

RO 0x0

IC_CLR_RX_UNDER

0x44

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_CLR_RX_UNDER

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_CLR_RX_UNDER

RO 0x0

CLR_RX_UNDER

RO 0x0

IC_CLR_RX_OVER

0x48

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_CLR_RX_OVER

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_CLR_RX_OVER

RO 0x0

CLR_RX_OVER

RO 0x0

IC_CLR_TX_OVER

0x4C

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_CLR_TX_OVER

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_CLR_TX_OVER

RO 0x0

CLR_TX_OVER

RO 0x0

IC_CLR_RD_REQ

0x50

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_CLR_RD_REQ

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_CLR_RD_REQ

RO 0x0

CLR_RD_REQ

RO 0x0

IC_CLR_TX_ABRT

0x54

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_CLR_TX_ABRT

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_CLR_TX_ABRT

RO 0x0

CLR_TX_ABRT

RO 0x0

IC_CLR_RX_DONE

0x58

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_CLR_RX_DONE

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_CLR_RX_DONE

RO 0x0

CLR_RX_DONE

RO 0x0

IC_CLR_ACTIVITY

0x5C

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_CLR_ACTIVITY

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_CLR_ACTIVITY

RO 0x0

CLR_ACTIVITY

RO 0x0

IC_CLR_STOP_DET

0x60

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_CLR_STOP_DET

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_CLR_STOP_DET

RO 0x0

CLR_STOP_DET

RO 0x0

IC_CLR_START_DET

0x64

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_CLR_START_DET

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_CLR_START_DET

RO 0x0

CLR_START_DET

RO 0x0

IC_CLR_GEN_CALL

0x68

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_CLR_GEN_CALL

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_CLR_GEN_CALL

RO 0x0

CLR_GEN_CALL

RO 0x0

IC_ENABLE

0x6C

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_ENABLE_2

RO 0x0

RSVD_SMBUS_ALERT_EN

RO 0x0

RSVD_SMBUS_SUSPEND_EN

RO 0x0

RSVD_SMBUS_CLK_RESET

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_ENABLE_1

RO 0x0

RSVD_SDA_STUCK_RECOVERY_ENABLE

RO 0x0

TX_CMD_BLOCK

RW 0x0

ABORT

RW 0x0

ENABLE

RW 0x0

IC_STATUS

0x70

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_STATUS_2

RO 0x0

RSVD_SMBUS_ALERT_STATUS

RO 0x0

RSVD_SMBUS_SUSPEND_STATUS

RO 0x0

RSVD_SMBUS_SLAVE_ADDR_RESOLVED

RO 0x0

RSVD_SMBUS_SLAVE_ADDR_VALID

RO 0x0

RSVD_SMBUS_QUICK_CMD_BIT

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_STATUS_1

RO 0x0

RSVD_SDA_STUCK_NOT_RECOVERED

RO 0x0

RSVD_SLV_HOLD_RX_FIFO_FULL

RO 0x0

RSVD_SLV_HOLD_TX_FIFO_EMPTY

RO 0x0

RSVD_MST_HOLD_RX_FIFO_FULL

RO 0x0

RSVD_MST_HOLD_TX_FIFO_EMPTY

RO 0x0

SLV_ACTIVITY

RO 0x0

MST_ACTIVITY

RO 0x0

RFF

RO 0x0

RFNE

RO 0x0

TFE

RO 0x1

TFNF

RO 0x1

IC_STATUS_ACTIVITY

RO 0x0

IC_TXFLR

0x74

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_TXFLR

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_TXFLR

RO 0x0

TXFLR

RO 0x0

IC_RXFLR

0x78

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_RXFLR

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_RXFLR

RO 0x0

RXFLR

RO 0x0

IC_SDA_HOLD

0x7C

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_SDA_HOLD

RO 0x0

IC_SDA_RX_HOLD

RW 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

IC_SDA_TX_HOLD

RW 0x1

IC_TX_ABRT_SOURCE

0x80

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

TX_FLUSH_CNT

RO 0x0

RSVD_IC_TX_ABRT_SOURCE

RO 0x0

RSVD_ABRT_DEVICE_WRITE

RO 0x0

RSVD_ABRT_SDA_STUCK_AT_LOW

RO 0x0

ABRT_USER_ABRT

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

ABRT_SLVRD_INTX

RO 0x0

ABRT_SLV_ARBLOST

RO 0x0

ABRT_SLVFLUSH_TXFIFO

RO 0x0

ARB_LOST

RO 0x0

ABRT_MASTER_DIS

RO 0x0

ABRT_10B_RD_NORSTRT

RO 0x0

ABRT_SBYTE_NORSTRT

RO 0x0

ABRT_HS_NORSTRT

RO 0x0

ABRT_SBYTE_ACKDET

RO 0x0

ABRT_HS_ACKDET

RO 0x0

ABRT_GCALL_READ

RO 0x0

ABRT_GCALL_NOACK

RO 0x0

ABRT_TXDATA_NOACK

RO 0x0

ABRT_10ADDR2_NOACK

RO 0x0

ABRT_10ADDR1_NOACK

RO 0x0

ABRT_7B_ADDR_NOACK

RO 0x0

IC_SLV_DATA_NACK_ONLY

0x84

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_SLV_DATA_NACK_ONLY

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_SLV_DATA_NACK_ONLY

RO 0x0

NACK

RW 0x0

IC_DMA_CR

0x88

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_DMA_CR_2_31

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_DMA_CR_2_31

RO 0x0

TDMAE

RW 0x0

RDMAE

RW 0x0

IC_DMA_TDLR

0x8C

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_DMA_TDLR

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_DMA_TDLR

RO 0x0

DMATDL

RW 0x0

IC_DMA_RDLR

0x90

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_DMA_RDLR

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_DMA_RDLR

RO 0x0

DMARDL

RW 0x0

IC_SDA_SETUP

0x94

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_SDA_SETUP

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_SDA_SETUP

RO 0x0

SDA_SETUP

RW 0x64

IC_ACK_GENERAL_CALL

0x98

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_ACK_GEN_1_31

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_ACK_GEN_1_31

RO 0x0

ACK_GEN_CALL

RW 0x1

IC_ENABLE_STATUS

0x9C

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_ENABLE_STATUS

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_ENABLE_STATUS

RO 0x0

SLV_RX_DATA_LOST

RO 0x0

SLV_DISABLED_WHILE_BUSY

RO 0x0

IC_EN

RO 0x0

IC_FS_SPKLEN

0xA0

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_FS_SPKLEN

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_FS_SPKLEN

RO 0x0

IC_FS_SPKLEN

RW 0x2

IC_CLR_RESTART_DET

0xA8

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_CLR_RESTART_DET

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_CLR_RESTART_DET

RO 0x0

CLR_RESTART_DET

RO 0x0

IC_COMP_PARAM_1

0xF4

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_COMP_PARAM_1

RO 0x0

TX_BUFFER_DEPTH

RO 0x3F

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RX_BUFFER_DEPTH

RO 0x3F

ADD_ENCODED_PARAMS

RO 0x1

HAS_DMA

RO 0x1

INTR_IO

RO 0x1

HC_COUNT_VALUES

RO 0x0

MAX_SPEED_MODE

RO 0x2

APB_DATA_WIDTH

RO 0x2

IC_COMP_VERSION

0xF8

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

IC_COMP_VERSION

RO 0x3230302A

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

IC_COMP_VERSION

RO 0x3230302A

IC_COMP_TYPE

0xFC

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

IC_COMP_TYPE

RO 0x44570140

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

IC_COMP_TYPE

RO 0x44570140

i_i2c_emac_2_DW_apb_i2c_addr_block1

IC_CON

0x0

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_CON_2

RO 0x0

RSVD_SMBUS_PERSISTENT_SLV_ADDR_EN

RO 0x0

RSVD_SMBUS_ARP_EN

RO 0x0

RSVD_SMBUS_SLAVE_QUICK_EN

RO 0x0

RSVD_OPTIONAL_SAR_CTRL

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_CON_1

RO 0x0

RSVD_BUS_CLEAR_FEATURE_CTRL

RO 0x0

STOP_DET_IF_MASTER_ACTIVE

RO 0x0

RX_FIFO_FULL_HLD_CTRL

RO 0x0

TX_EMPTY_CTRL

RW 0x0

STOP_DET_IFADDRESSED

RW 0x0

IC_SLAVE_DISABLE

RW 0x1

IC_RESTART_EN

RW 0x1

IC_10BITADDR_MASTER_rd_only

RO 0x1

IC_10BITADDR_SLAVE

RW 0x1

SPEED

RW 0x2

MASTER_MODE

RW 0x1

IC_TAR

0x4

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_TAR_2

RO 0x0

RSVD_SMBUS_QUICK_CMD

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_TAR_1

RO 0x0

RSVD_DEVICE_ID

RO 0x0

IC_10BITADDR_MASTER

RW 0x1

SPECIAL

RW 0x0

GC_OR_START

RW 0x0

IC_TAR

RW 0x55

IC_SAR

0x8

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_SAR

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_SAR

RO 0x0

IC_SAR

RW 0x55

IC_DATA_CMD

0x10

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_DATA_CMD

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_DATA_CMD

RO 0x0

FIRST_DATA_BYTE

RO 0x0

RESTART

WO 0x0

STOP

WO 0x0

CMD

WO 0x0

DAT

RW 0x0

IC_SS_SCL_HCNT

0x14

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_SS_SCL_HIGH_COUNT

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

IC_SS_SCL_HCNT

RW 0x1F4

IC_SS_SCL_LCNT

0x18

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_SS_SCL_LOW_COUNT

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

IC_SS_SCL_LCNT

RW 0x24C

IC_FS_SCL_HCNT

0x1C

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_FS_SCL_HCNT

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

IC_FS_SCL_HCNT

RW 0x4B

IC_FS_SCL_LCNT

0x20

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_FS_SCL_LCNT

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

IC_FS_SCL_LCNT

RW 0xA3

IC_INTR_STAT

0x2C

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_INTR_STAT

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_INTR_STAT

RO 0x0

RSVD_R_SCL_STUCK_AT_LOW

RO 0x0

R_MASTER_ON_HOLD

RO 0x0

R_RESTART_DET

RO 0x0

R_GEN_CALL

RO 0x0

R_START_DET

RO 0x0

R_STOP_DET

RO 0x0

R_ACTIVITY

RO 0x0

R_RX_DONE

RO 0x0

R_TX_ABRT

RO 0x0

R_RD_REQ

RO 0x0

R_TX_EMPTY

RO 0x0

R_TX_OVER

RO 0x0

R_RX_FULL

RO 0x0

R_RX_OVER

RO 0x0

R_RX_UNDER

RO 0x0

IC_INTR_MASK

0x30

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_INTR_STAT

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_INTR_STAT

RO 0x0

RSVD_M_SCL_STUCK_AT_LOW

RO 0x0

M_MASTER_ON_HOLD

RW 0x0

M_RESTART_DET

RW 0x0

M_GEN_CALL

RW 0x1

M_START_DET

RW 0x0

M_STOP_DET

RW 0x0

M_ACTIVITY

RW 0x0

M_RX_DONE

RW 0x1

M_TX_ABRT

RW 0x1

M_RD_REQ

RW 0x1

M_TX_EMPTY

RW 0x1

M_TX_OVER

RW 0x1

M_RX_FULL

RW 0x1

M_RX_OVER

RW 0x1

M_RX_UNDER

RW 0x1

IC_RAW_INTR_STAT

0x34

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_RAW_INTR_STAT

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_RAW_INTR_STAT

RO 0x0

RSVD_SCL_STUCK_AT_LOW

RO 0x0

MASTER_ON_HOLD

RO 0x0

RESTART_DET

RO 0x0

GEN_CALL

RO 0x0

START_DET

RO 0x0

STOP_DET

RO 0x0

RAW_INTR_ACTIVITY

RO 0x0

RX_DONE

RO 0x0

TX_ABRT

RO 0x0

RD_REQ

RO 0x0

TX_EMPTY

RO 0x0

TX_OVER

RO 0x0

RX_FULL

RO 0x0

RX_OVER

RO 0x0

RX_UNDER

RO 0x0

IC_RX_TL

0x38

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_RX_TL

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_RX_TL

RO 0x0

RX_TL

RW 0x0

IC_TX_TL

0x3C

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_TX_TL

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_TX_TL

RO 0x0

TX_TL

RW 0x0

IC_CLR_INTR

0x40

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_CLR_INTR

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_CLR_INTR

RO 0x0

CLR_INTR

RO 0x0

IC_CLR_RX_UNDER

0x44

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_CLR_RX_UNDER

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_CLR_RX_UNDER

RO 0x0

CLR_RX_UNDER

RO 0x0

IC_CLR_RX_OVER

0x48

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_CLR_RX_OVER

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_CLR_RX_OVER

RO 0x0

CLR_RX_OVER

RO 0x0

IC_CLR_TX_OVER

0x4C

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_CLR_TX_OVER

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_CLR_TX_OVER

RO 0x0

CLR_TX_OVER

RO 0x0

IC_CLR_RD_REQ

0x50

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_CLR_RD_REQ

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_CLR_RD_REQ

RO 0x0

CLR_RD_REQ

RO 0x0

IC_CLR_TX_ABRT

0x54

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_CLR_TX_ABRT

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_CLR_TX_ABRT

RO 0x0

CLR_TX_ABRT

RO 0x0

IC_CLR_RX_DONE

0x58

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_CLR_RX_DONE

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_CLR_RX_DONE

RO 0x0

CLR_RX_DONE

RO 0x0

IC_CLR_ACTIVITY

0x5C

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_CLR_ACTIVITY

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_CLR_ACTIVITY

RO 0x0

CLR_ACTIVITY

RO 0x0

IC_CLR_STOP_DET

0x60

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_CLR_STOP_DET

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_CLR_STOP_DET

RO 0x0

CLR_STOP_DET

RO 0x0

IC_CLR_START_DET

0x64

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_CLR_START_DET

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_CLR_START_DET

RO 0x0

CLR_START_DET

RO 0x0

IC_CLR_GEN_CALL

0x68

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_CLR_GEN_CALL

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_CLR_GEN_CALL

RO 0x0

CLR_GEN_CALL

RO 0x0

IC_ENABLE

0x6C

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_ENABLE_2

RO 0x0

RSVD_SMBUS_ALERT_EN

RO 0x0

RSVD_SMBUS_SUSPEND_EN

RO 0x0

RSVD_SMBUS_CLK_RESET

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_ENABLE_1

RO 0x0

RSVD_SDA_STUCK_RECOVERY_ENABLE

RO 0x0

TX_CMD_BLOCK

RW 0x0

ABORT

RW 0x0

ENABLE

RW 0x0

IC_STATUS

0x70

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_STATUS_2

RO 0x0

RSVD_SMBUS_ALERT_STATUS

RO 0x0

RSVD_SMBUS_SUSPEND_STATUS

RO 0x0

RSVD_SMBUS_SLAVE_ADDR_RESOLVED

RO 0x0

RSVD_SMBUS_SLAVE_ADDR_VALID

RO 0x0

RSVD_SMBUS_QUICK_CMD_BIT

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_STATUS_1

RO 0x0

RSVD_SDA_STUCK_NOT_RECOVERED

RO 0x0

RSVD_SLV_HOLD_RX_FIFO_FULL

RO 0x0

RSVD_SLV_HOLD_TX_FIFO_EMPTY

RO 0x0

RSVD_MST_HOLD_RX_FIFO_FULL

RO 0x0

RSVD_MST_HOLD_TX_FIFO_EMPTY

RO 0x0

SLV_ACTIVITY

RO 0x0

MST_ACTIVITY

RO 0x0

RFF

RO 0x0

RFNE

RO 0x0

TFE

RO 0x1

TFNF

RO 0x1

IC_STATUS_ACTIVITY

RO 0x0

IC_TXFLR

0x74

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_TXFLR

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_TXFLR

RO 0x0

TXFLR

RO 0x0

IC_RXFLR

0x78

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_RXFLR

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_RXFLR

RO 0x0

RXFLR

RO 0x0

IC_SDA_HOLD

0x7C

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_SDA_HOLD

RO 0x0

IC_SDA_RX_HOLD

RW 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

IC_SDA_TX_HOLD

RW 0x1

IC_TX_ABRT_SOURCE

0x80

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

TX_FLUSH_CNT

RO 0x0

RSVD_IC_TX_ABRT_SOURCE

RO 0x0

RSVD_ABRT_DEVICE_WRITE

RO 0x0

RSVD_ABRT_SDA_STUCK_AT_LOW

RO 0x0

ABRT_USER_ABRT

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

ABRT_SLVRD_INTX

RO 0x0

ABRT_SLV_ARBLOST

RO 0x0

ABRT_SLVFLUSH_TXFIFO

RO 0x0

ARB_LOST

RO 0x0

ABRT_MASTER_DIS

RO 0x0

ABRT_10B_RD_NORSTRT

RO 0x0

ABRT_SBYTE_NORSTRT

RO 0x0

ABRT_HS_NORSTRT

RO 0x0

ABRT_SBYTE_ACKDET

RO 0x0

ABRT_HS_ACKDET

RO 0x0

ABRT_GCALL_READ

RO 0x0

ABRT_GCALL_NOACK

RO 0x0

ABRT_TXDATA_NOACK

RO 0x0

ABRT_10ADDR2_NOACK

RO 0x0

ABRT_10ADDR1_NOACK

RO 0x0

ABRT_7B_ADDR_NOACK

RO 0x0

IC_SLV_DATA_NACK_ONLY

0x84

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_SLV_DATA_NACK_ONLY

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_SLV_DATA_NACK_ONLY

RO 0x0

NACK

RW 0x0

IC_DMA_CR

0x88

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_DMA_CR_2_31

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_DMA_CR_2_31

RO 0x0

TDMAE

RW 0x0

RDMAE

RW 0x0

IC_DMA_TDLR

0x8C

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_DMA_TDLR

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_DMA_TDLR

RO 0x0

DMATDL

RW 0x0

IC_DMA_RDLR

0x90

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_DMA_RDLR

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_DMA_RDLR

RO 0x0

DMARDL

RW 0x0

IC_SDA_SETUP

0x94

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_SDA_SETUP

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_SDA_SETUP

RO 0x0

SDA_SETUP

RW 0x64

IC_ACK_GENERAL_CALL

0x98

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_ACK_GEN_1_31

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_ACK_GEN_1_31

RO 0x0

ACK_GEN_CALL

RW 0x1

IC_ENABLE_STATUS

0x9C

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_ENABLE_STATUS

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_ENABLE_STATUS

RO 0x0

SLV_RX_DATA_LOST

RO 0x0

SLV_DISABLED_WHILE_BUSY

RO 0x0

IC_EN

RO 0x0

IC_FS_SPKLEN

0xA0

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_FS_SPKLEN

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_FS_SPKLEN

RO 0x0

IC_FS_SPKLEN

RW 0x2

IC_CLR_RESTART_DET

0xA8

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_CLR_RESTART_DET

RO 0x0

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RSVD_IC_CLR_RESTART_DET

RO 0x0

CLR_RESTART_DET

RO 0x0

IC_COMP_PARAM_1

0xF4

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

RSVD_IC_COMP_PARAM_1

RO 0x0

TX_BUFFER_DEPTH

RO 0x3F

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

RX_BUFFER_DEPTH

RO 0x3F

ADD_ENCODED_PARAMS

RO 0x1

HAS_DMA

RO 0x1

INTR_IO

RO 0x1

HC_COUNT_VALUES

RO 0x0

MAX_SPEED_MODE

RO 0x2

APB_DATA_WIDTH

RO 0x2

IC_COMP_VERSION

0xF8

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

IC_COMP_VERSION

RO 0x3230302A

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

IC_COMP_VERSION

RO 0x3230302A

IC_COMP_TYPE

0xFC

32-bit

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16

IC_COMP_TYPE

RO 0x44570140

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

IC_COMP_TYPE

RO 0x44570140