3-Gbps SDI Video.pdf
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- |
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40-nm FPGA Power Management and Advantages.pdf
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- |
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40-nm FPGAs and the Defense Electronic Design Organization.pdf
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- |
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40-nm FPGAs: Architecture and Performance Comparison.pdf
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- |
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8 Reasons to Use FPGAs in IEC 61508 Functional Safety Applications.pdf
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- |
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A Flexible Architecture for Fisheye Correction in Automotive Rear-View Cameras.pdf
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- |
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A Flexible Solution for Industrial Ethernet.pdf
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- |
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A New FPGA Architecture and Leading-Edge FinFET Process Technology Promise to Meet Next-Generation System Requirements.pdf
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- |
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A Reconfigurable Fabric for Accelerating Large-Scale Datacenter Services.pdf
|
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- |
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A Safety Methodology for ADAS Designs in FPGAs.pdf
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- |
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A Significant Technology Advancement in High-Speed Link Modeling and Simulation.pdf
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- |
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A Tailored Approach to FPGA Process Selection.pdf
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- |
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A Validated Methodology for Designing Safe Industrial Systems on a Chip.pdf
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- |
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Abstract – Floating Point.pdf
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- |
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Accelerating DSP Designs with the Total 28-nm DSP Portfolio.pdf
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- |
|
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Accelerating Genomics Research with OpenCL and FPGAs.pdf
|
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- |
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Accelerating Genomics Research with OpenCL™ and FPGAs.pdf
|
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- |
|
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Accelerating Memory Bound AI Inference Workloads with Intel® Stratix® 10 MX Devices.pdf
|
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- |
|
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Accelerating WiMAX System Design with FPGAs.pdf
|
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- |
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Achieving Low Power in 65-nm Cyclone III FPGAs.pdf
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- |
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Achieving Lowest System Cost with Midrange 28-nm FPGAs.pdf
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- |
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Achieving Lowest System Power with Low-Power 28-nm FPGAs.pdf
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- |
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Achieving SerDes Interoperability on Altera's 28 nm FPGAs Using Introspect ESP.pdf
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- |
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Achieving the Highest Levels of Integration in Programmable Logic.pdf
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- |
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Adding Hardware Accelerators to Reduce Power in Embedded Systems.pdf
|
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- |
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Addressing 100-GbE Line-Card Design Challenges on 28-nm FPGAs.pdf
|
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- |
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Addressing 5G Network Function Requirements.pdf
|
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- |
|
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Addressing Next-Generation Memory Requirements Using Intel® FPGAs and HMC Technology.pdf
|
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- |
|
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Addressing SWaP Challenges in Military Platforms With 65-nm FPGAs and Structured ASICs.pdf
|
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- |
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Advanced System Management with Analog Non-Volatile FPGAs.pdf
|
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- |
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Advantages of Using FPGAs in Precision Inverter Modules.pdf
|
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- |
|
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Altera FPGAs Drive Sharp Two-Way Viewing Angle LCD Architecture.pdf
|
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- |
|
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Altera Hot-Socketing & Power-Sequencing Advantages White Paper.pdf
|
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- |
|
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Altera and IDT Synchronous Ethernet Solution for ITU-T G.8262 White Paper.pdf
|
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- |
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Altera at 40 nm: Jitter, Signal Integrity, Power, and Process Optimized.pdf
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Altera at 40 nm: Jitter, Signal Integrity, Power, and Process Optimized.pdf
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- |
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Altera’s 28-nm FPGAs Optimized for Broadcast Video Applications.pdf
|
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- |
|
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An Alternative to Bus-Based Interconnects for Large-Scale Design.pdf
|
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- |
|
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An Analytical Review of FPGA Logic Efficiency in Stratix, Virtex-II and Virtex-II Pro Devices.pdf
|
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- |
|
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An Analytical Review of FPGA Logic Efficiency in Stratix, Virtex-II and Virtex-II Pro Devices.pdf
|
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- |
|
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An FPGA Design Security Solution Using a Secure Memory Device.pdf
|
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- |
|
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An Independent Analysis of Altera’s FPGA Floating-point DSP Design Flow.pdf
|
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- |
|
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An Independent Analysis of Floating-point DSP Design Flow and Performance on Altera 28-nm FPGAs.pdf
|
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- |
|
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An Independent Evaluation of Floating-point DSP Energy Efficiency on Altera 28 nm FPGAs.pdf
|
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- |
|
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Anti-Tamper Capabilities in FPGA Designs.pdf
|
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- |
|
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Applying Graphics to FPGA-Based Solutions.pdf
|
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- |
|
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Applying the Benefits of Network on a Chip Architecture to FPGA System Design.pdf
|
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- |
|
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Architectural Differences Between Stratix II and Stratix Devices.pdf
|
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- |
|
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Architecture and Component Selection for Optimized SDR Applications.pdf
|
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- |
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Architecture and Component Selection for Optimized SDR Applications.pdf
|
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- |
|
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Are FPGAs the answer to the “Compute Gap?”.pdf
|
|
2018-12-21 |
|
|
Arria V FPGA White Papers.pdf
|
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- |
|
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Artificial Intelligence and Machine Learning.pdf
|
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- |
|
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Assessing FPGA DSP Benchmarks at 40 nm.pdf
|
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- |
|
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Automated Generation of Hardware Accelerators With Direct Memory Access From ANSI/ISO Standard C Functions.pdf
|
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- |
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Automating DSP Simulation and Implementation of Military Sensor Systems.pdf
|
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- |
|
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Avoiding PCB Design Mistakes in FPGA-Based Systems.pdf
|
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- |
|
|
Backplane Applications with 28 nm FPGAs White Paper.pdf
|
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- |
|
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Bare-Metal, RTOS, or Linux? Optimize Real-Time Performance with Altera SoCs.pdf
|
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- |
|
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Basic Principles of Signal Integrity.pdf
|
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- |
|
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Benefits of Altera’s High-Speed DDR2 SDRAM Memory Interface Solution.pdf
|
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- |
|
|
Board Design Guidelines for LVDS Systems.pdf
|
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- |
|
|
Boost Performance of Video Analytics with the Intel® Vision Accelerator Design with Intel® Arria® 10 FPGA.pdf
|
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- |
|
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Boosting System Performance with External Memory Solutions.pdf
|
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- |
|
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Broadcast Video Infrastructure Implementation Using FPGAs.pdf
|
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- |
|
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Building Flexible, Cost-Efficient Broadband Access Equipment Line Cards.pdf
|
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- |
|
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Building Flexible, Cost-Efficient Broadband Access Line Cards.pdf
|
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- |
|
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Building a PoC of Segment Routing at 100G Using FPGA Smart NIC and P4 Language.pdf
|
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- |
|
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Building an IP Surveillance Camera System with a Low-Cost FPGA.pdf
|
|
- |
|
|
Challenges in Manufacturing Reliable Lead-Free and RoHS-Compliant Components.pdf
|
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- |
|
|
Compiler and FPGA Overlay for Neural Network Inference Acceleration.pdf
|
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- |
|
|
Compromises of Using a 10-Gbps Transceiver at Other Data Rates.pdf
|
|
- |
|
|
Configuring the MicroBlaster Fast Passive
Parallel Software Driver.pdf
|
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- |
|
|
Controlling Analog Output From a Digital CPLD Using PWM.pdf
|
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- |
|
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Creating Low-Cost Intelligent Display Modules With an FPGA and Embedded Processor.pdf
|
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- |
|
|
Crest Factor Reduction for OFDM-Based Wireless Systems.pdf
|
|
- |
|
|
Customizing Multi-Service Access Network Silicon.pdf
|
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- |
|
|
DO-254 Support for FPGA Design Flows.pdf
|
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- |
|
|
DPA Circuitry and rx_dpa_locked Signal Behavior in Stratix III Devices.pdf
|
|
- |
|
|
DPD Profiling and Optimization with Altera SoCs White Paper.pdf
|
|
- |
|
|
DSP-FPGA System Partitioning for MIMO-OFDMA Wireless Basestations.pdf
|
|
- |
|
|
Decrease Total System Costs with Industry’s Lowest Cost, Lowest Power FPGAs.pdf
|
|
- |
|
|
Delivering Intelligent Bandwidth with Intel® Stratix® 10 Transceiver Tiles.pdf
|
|
- |
|
|
Delivering the Right Power and Performance for 28 nm High-End FPGAs White Paper.pdf
|
|
- |
|
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Delivering the Right Power and Performance for 28 nm High-End FPGAs White Paper.pdf
|
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- |
|
|
Design Security in Stratix III Devices.pdf
|
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- |
|
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Designing Filters for High Performance.pdf
|
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- |
|
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Designing High-Performance DSP Hardware Using Catapult C Synthesis and Altera Accelerated Libraries.pdf
|
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- |
|
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Designing Home Appliances With FPGAs.pdf
|
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- |
|
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Designing Polyphase DPD Solutions with 28-nm FPGAs.pdf
|
|
- |
|
|
Designing With Confidence for Military SDR Production Applications.pdf
|
|
- |
|
|
Designing and Using FPGAs for Double-Precision Floating Point Math.pdf
|
|
- |
|
|
Developing Functional Safety Systems with TÜV-Qualified FPGAs.pdf
|
|
- |
|
|
Developing MSAN Equipment Using Low-Cost FPGAs.pdf
|
|
- |
|
|
Developing Multipoint Touch Screens and Panels With CPLDs.pdf
|
|
- |
|
|
Driving Flexibility into Automotive Electronics Design.pdf
|
|
- |
|
|
Easily Gain Flexibility and Increased Integration With Advanced Cyclone III PLLs.pdf
|
|
- |
|
|
Electronic Warfare Design With PLDs and High-Speed Transceivers.pdf
|
|
- |
|
|
Enabling 100-Gbit OTN Muxponder Solutions on 28-nm FPGAs.pdf
|
|
- |
|
|
Enabling Design Separation for High-Reliability and Information-Assurance Systems.pdf
|
|
- |
|
|
Enabling Ethernet-Over-NG-SONET/SDH Solutions for MSPP Linecards.pdf
|
|
- |
|
|
Enabling High-Performance DSP Applications with Arria V or Cyclone V Variable-Precision DSP Blocks.pdf
|
|
- |
|
|
Enabling High-Performance DSP Applications with Stratix V Variable-Precision DSP Blocks.pdf
|
|
- |
|
|
Enabling High-Performance Floating-Point Designs.pdf
|
|
- |
|
|
Enabling Impactful DSP Designs on FPGAs with Hardened Floating-Point Implementation.pdf
|
|
- |
|
|
Enabling Improved Image Format Conversion with FPGAs.pdf
|
|
- |
|
|
Enabling Low-Power EO/IR System Development with FPGAs and Image- and Sensor-Processing IP.pdf
|
|
- |
|
|
Enabling Quality of Service With Customizable Traffic Managers.pdf
|
|
- |
|
|
Enhancing High-Speed Telecommunications Networks with FEC.pdf
|
|
- |
|
|
Enhancing Robust SEU Mitigation with 28-nm FPGAs.pdf
|
|
- |
|
|
Error Correction Code in SoC FPGA-Based Memory Systems.pdf
|
|
- |
|
|
Expand Server Memory Capacity and Improve Server Performance with Intel® Stratix® 10 FPGAs and Intel Optane™ DC Persistent Memory.pdf
|
|
- |
|
|
Expect a Breakthrough Advantage in Next-Generation FPGAs White Paper.pdf
|
|
- |
|
|
Expect a Breakthrough Advantage in Next-Generation FPGAs White Paper.pdf
|
|
- |
|
|
Exploiting Unstructured Sparsity on Next-Generation Datacenter Hardware.pdf
|
|
- |
|
|
Extending Silicon Convergence with Technology Innovations at 20 nm.pdf
|
|
- |
|
|
Extending Transceiver Leadership at 28 nm.pdf
|
|
- |
|
|
FPGA Acceleration of Multifunction Printer Image Processing using OpenCL.pdf
|
|
- |
|
|
FPGA Adaptive Software Debug and Performance Analysis,FPGA-Adaptive Software Debug and Performance Analysis.pdf
|
|
- |
|
|
FPGA Architecture White Paper.pdf
|
|
- |
|
|
FPGA Configuration via Protocol.pdf
|
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- |
|
|
FPGA Coprocessing Evolution: Sustained Performance Approaches Peak Performance.pdf
|
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- |
|
|
FPGA Design Security Solution Using MAX II Devices.pdf
|
|
- |
|
|
FPGA Inline Acceleration for Streaming Analytics.pdf
|
|
- |
|
|
FPGA Integration Increases Flexibility, Reduces Cost in Consumer Applications.pdf
|
|
- |
|
|
FPGA Performance Benchmarking Methodology.pdf
|
|
- |
|
|
FPGA Power Management and Modeling Techniques.pdf
|
|
- |
|
|
FPGA Product Support and EOL as Past Performance Indicators.pdf
|
|
- |
|
|
FPGA vs. DSP Design Reliability and Maintenance.pdf
|
|
- |
|
|
FPGA-Based Control for Electric Vehicle and Hybrid Electric Vehicle Power Electronics.pdf
|
|
- |
|
|
FPGAs Enable Energy-Efficient Motor Control in Next-Generation Smart Home Appliances.pdf
|
|
- |
|
|
FPGAs Power High-Performance Computing.pdf
|
|
- |
|
|
FPGAs at 40 nm and >10 Gbps: Jitter-, Signal Integrity-, Power-, and Process-Optimized Transceivers.pdf
|
|
- |
|
|
Finding Acceleration in a Video-Centric World.pdf
|
|
- |
|
|
Finding an Efficient Virtual Network Functon Architecture for Next-Generation Telecommunications Infrastructure.pdf
|
|
- |
|
|
First Demonstration of Chip-to-Module Electrical Channel Interoperability over OIF CEI-28G-VSR Compliant Links.pdf
|
|
- |
|
|
Five Ways to Build Flexibility into Industrial Appllications with FPGAs.pdf
|
|
- |
|
|
Five Ways to Build Flexibility into Industrial Appllications with FPGAs.pdf
|
|
- |
|
|
Flexibility: FPGAs and CAD in Deep Learning Acceleration.pdf
|
|
- |
|
|
Floating-Point Compiler: Increasing Performance With Fewer Resources.pdf
|
|
- |
|
|
Fulfilling Technology Needs for 40G–100G Network-Centric Operations and Warfare.pdf
|
|
- |
|
|
Gain Flexibility, Lower Costs in Display Control Through Integration With FPGAs.pdf
|
|
- |
|
|
Generating Functionally Equivalent FPGAs and ASICs With a Single Set of RTL and Synthesis/Timing Constraints.pdf
|
|
- |
|
|
Generating Panoramic Views by Stitching Multiple Fisheye Images.pdf
|
|
- |
|
|
Guaranteeing Silicon Performance with FPGA Timing Models.pdf
|
|
- |
|
|
Guidance for Accurately Benchmarking FPGAs.pdf
|
|
- |
|
|
Hardware in the Loop from the MATLAB/Simulink Environment.pdf
|
|
- |
|
|
Hardware/Software Co-Verification Using FPGA Platforms.pdf
|
|
- |
|
|
Harnessing Numerical Flexibility for Deep Learning on FPGAs.pdf
|
|
- |
|
|
High-Definition Video Deinterlacing Using FPGAs.pdf
|
|
- |
|
|
How to Upgrade a DDR SDRAM Controller MegaCore Function v2.1 Design to v2.2 White Paper.pdf
|
|
- |
|
|
IPTV’s Key Broadcast Building Blocks.pdf
|
|
- |
|
|
Implementation of CORDIC-Based QRD-RLS Algorithm on Altera Stratix FPGA with Embedded Nios Soft Processor Technology.pdf
|
|
- |
|
|
Implementation of the Smith-Waterman Algorithm on a Reconfigurable Supercomputing Platform.pdf
|
|
- |
|
|
Implementing Digital IF & Digital Predistortion Linearizer Functions with Programmable Logic.pdf
|
|
- |
|
|
Implementing Digital Processing for Automotive Radar Using SoCs White Paper.pdf
|
|
- |
|
|
Implementing Efficient Low-Power PCIe Interfaces with Low-Cost FPGAs.pdf
|
|
- |
|
|
Implementing FIR Filters and FFTs with 28-nm Variable-Precision DSP Architecture.pdf
|
|
- |
|
|
Implementing FPGA Design with the OpenCL Standard.pdf
|
|
- |
|
|
Implementing LED Drivers In MAX Devices.pdf
|
|
- |
|
|
Implementing Next-Generation Passive Optical Network Designs with FPGAs.pdf
|
|
- |
|
|
Implementing Next-Generation Passive Optical Network Designs with FPGAs.pdf
|
|
- |
|
|
Implementing a Cost-Effective Human-Machine Interface for Home Appliances.pdf
|
|
- |
|
|
Implementing a Flexible CPLD-Only Digital Dashboard for Automobiles.pdf
|
|
- |
|
|
Implementing a Multirate Uncompressed Video Interface for Broadcast Applications.pdf
|
|
- |
|
|
Implementing a Queue Manager in Traffic Management Systems White Paper.pdf
|
|
- |
|
|
Implementing the MicroBlaster Configuration on the ColdFire Development Board White Paper.pdf
|
|
- |
|
|
Implementing the Top Five Control-Path Applications with Low-Cost, Low-Power CPLDs.pdf
|
|
- |
|
|
Improve Cost, Performance, and Productivity for Video Surveillance Using FPGAs.pdf
|
|
- |
|
|
Improving Battery Management System Performance and Cost with Altera FPGAs.pdf
|
|
- |
|
|
Improving Pin-to-Pin Timing in Stratix & Stratix GX Devices.pdf
|
|
- |
|
|
In-Line Acceleration for Streaming Analytics.pdf
|
|
- |
|
|
Increase Bandwidth in Medical & Industrial Applications With FPGA Co-Processors.pdf
|
|
- |
|
|
Increase Performance in Imaging Applications by Integrating DSP Functions With FPGAs.pdf
|
|
- |
|
|
Increase Performance in Video and Image Processing Applications With FPGA Integration.pdf
|
|
- |
|
|
Increasing Design Functionality with Partial and Dynamic Reconfiguration in 28-nm FPGAs.pdf
|
|
- |
|
|
Increasing Efficiency with Hard Memory Controllers in Low-Cost 28 nm FPGAs White Paper.pdf
|
|
- |
|
|
Increasing Productivity With Quartus II Incremental Compilation.pdf
|
|
- |
|
|
Innovating With a Full Spectrum of 40-nm FPGAs and ASICs With Transceivers.pdf
|
|
- |
|
|
Input Signal Edge Rate Guidance.pdf
|
|
- |
|
|
Integrating 100-GbE Switching Solutions on 28-nm FPGAs.pdf
|
|
- |
|
|
Intel Arria 10 Performance Benchmarking Methodology and Results.pdf
|
|
- |
|
|
Intel® Agilex™ FPGAs Deliver a Game-Changing Combination of Flexibility and Agility for the Data-Centric World.pdf
|
|
- |
|
Intel® Agilex™ |
Intel® FPGAs Accelerate Intel® Xeon® Scalable Processors in Servers and High-End Embedded Systems.pdf
|
|
- |
|
Intel® Stratix® 10 DX |
Intel® Stratix® 10 MX Devices with Samsung* HBM2 Solve the Memory Bandwidth Challenge.pdf
|
|
- |
|
|
Introducing Innovations at 28 nm to Move Beyond Moore’s Law.pdf
|
|
- |
|
|
Introducing the Intel Vision Accelerator Design with Intel Arria 10 FPGA.pdf
|
|
- |
|
|
Introduction to Single-Event Upsets.pdf
|
|
- |
|
|
JESD204A for Wireless Base Station and Radar Systems.pdf
|
|
- |
|
|
Leveraging Cost-Optimized FPGAs to Deliver OTN Mapper Solutions.pdf
|
|
- |
|
|
Leveraging the 40-nm Process Node to Deliver the World’s Most Advanced Custom Logic Devices.pdf
|
|
- |
|
|
Leveraging the Intel® HyperFlex™ FPGA Architecture in Intel Stratix® 10 Devices to Achieve Maximum Power Reduction.pdf
|
|
- |
|
|
Logic Efficiency in Stratix, Virtex-II & Virtex-II Pro Devices.pdf
|
|
- |
|
|
Low Latency GRE Processing Accelerator Evaluation.pdf
|
|
- |
|
|
Low-Cost FPGA Solution for PCI Express Implementation.pdf
|
|
- |
|
|
Low-Cost Implementation of High-Performance PCIe Gen2 Hard IP White Paper.pdf
|
|
- |
|
|
Low-Cost Integration of Serial EEPROMs and Flash Memory Devices.pdf
|
|
- |
|
|
Lower Costs in Broadcasting Applications With Integration Using FPGAs.pdf
|
|
- |
|
|
Lowering the Total Cost of Ownership in Industrial Applications.pdf
|
|
- |
|
|
MAX II I/O Characteristics During Hot Socketing.pdf
|
|
- |
|
|
MAX II Logic Element to Macrocell Conversion Methodology White Paper.pdf
|
|
- |
|
|
MAX Series Configuration Controller Using Flash Memory.pdf
|
|
- |
|
|
Medical Imaging Implementation Using FPGAs.pdf
|
|
- |
|
|
Meeting the Low Power Imperative at 28nm.pdf
|
|
- |
|
|
Meeting the Performance and Power Imperative of the Zettabyte Era with Generation 10 White Paper.pdf
|
|
- |
|
|
Microsoft Word - Accelerating_Nios_II_Ethernet_Applications_wp.doc.pdf
|
|
- |
|
|
Microsoft Word - HotSocketing_Feature_&_Testing.doc.pdf
|
|
- |
|
|
Microsoft Word - signal-integrity_s2-v4.doc.pdf
|
|
- |
|
|
Microsoft Word - sonet_backplane.doc.pdf
|
|
- |
|
|
Microsoft Word - wp_dsp_comp.doc.pdf
|
|
- |
|
|
Microsoft Word - wp_s2v4perf_rev.doc.pdf
|
|
- |
|
|
Microsoft Word - wpstxiiple_rev.doc.pdf
|
|
- |
|
|
Military Benefits of the Managed Risk Process at 40 nm.pdf
|
|
- |
|
|
Military Productivity Factors in Large FPGA Designs.pdf
|
|
- |
|
|
Minimizing Ground Bounce & VCC Sag.pdf
|
|
- |
|
|
Modeling System Signal Integrity Uncertainty Considerations.pdf
|
|
- |
|
|
MorphIO: An I/O Reconfiguration Solution for Altera Devices.pdf
|
|
- |
|
|
Motor Control Designs with an Integrated FPGA Design Flow.pdf
|
|
- |
|
|
OPC UA TSNA new Solution for Industrial Communication.pdf
|
|
2019-11-13 |
|
|
OTN Transport of Baseband Radio Serial Protocols in C-RAN Architecture for Mobile Network Applications.pdf
|
|
- |
|
|
One-Resistor RSDS Solution for Cyclone II Devices.pdf
|
|
- |
|
|
OpenCL on FPGAs for GPU Programmers.pdf
|
|
- |
|
|
Optical Transport Networks for 100G Implementation in FPGAs.pdf
|
|
- |
|
|
Optimize Power and Cost with Altera’s Diversified 28-nm Device Portfolio.pdf
|
|
- |
|
|
Optimize System Flexibility by Integrating Custom Microprocessors Into FPGAs.pdf
|
|
- |
|
|
Optimizing Radar and Advanced Sensor Functions With FPGAs.pdf
|
|
- |
|
|
Overcome Copper Limits with Optical Interfaces.pdf
|
|
- |
|
|
Overcome Design Challenges with an Innovative IP Scalability, Integration, and Delivery Model.pdf
|
|
- |
|
|
Overcome High-Speed I/O Verification Challenges with Stratix V On-Die Instrumentation.pdf
|
|
- |
|
|
PDN Design and FPGA Transceiver Performance.pdf
|
|
- |
|
|
PLC Architecture in the Industry 4.0 World: Challenges, Trends, and Solutions.pdf
|
|
- |
|
|
POS-PHY Level 4 MegaCore Function Errata Sheet.pdf
|
|
- |
|
|
POS-PHY Level 4 MegaCore Function Errata Sheet.pdf
|
|
- |
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Performing Equivalent Timing Analysis Between Altera Classic Timing Analyzer and Xilinx Trace.pdf
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Performing Equivalent Timing Analysis Between Altera TimeQuest and Xilinx Trace.pdf
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Power-Optimized Solutions for Telecom Applications.pdf
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Programmable Platform Solutions.pdf
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Protecting the FPGA Design From Common Threats.pdf
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Providing Battery-Free, FPGA-Based RAID Cache Solutions.pdf
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Quality of Service in Home Networking.pdf
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Real-Time Challenges and Opportunities in SoCs White Paper.pdf
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Reap Rewards by Minimizing Risk: Altera’s Strategies for Delivering the Benefits of the 65-nm Process Node.pdf
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Reduce Manufacturing Costs by Integrating Flash Device Programming.pdf
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Reduce System Costs by Integrating PCI Interface Functions Into CPLDs.pdf
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Reduce Total System Cost in Portable Applications Using Zero-Power CPLDs.pdf
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Reduce Total System Cost in Portable Applications Using Zero-Power CPLDs.pdf
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Reducing Development Time for Advanced Medical Endoscopy Systems with an FPGA-Based Approach White Paper.pdf
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Reducing Power Consumption and Increasing Bandwidth on 28-nm FPGAs.pdf
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Reducing Steps to Achieve Safety Certification.pdf
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Reducing Total System Cost with Low-Power 28 nm FPGAs.pdf
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Reducing the Cost of Wireless Backhauling Through Circuit Emulation.pdf
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Remote Radio Heads and the Evolution Towards 4G Networks.pdf
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Robust SEU Mitigation With Stratix III FPGAs.pdf
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SEmulation: Turbocharging the FPGA Development Process.pdf
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Satisfying the Demand for Rapid Feature Enhancement in Consumer Display Products.pdf
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Secure Computing Environment for SoCs and FPGAs.pdf
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Secure Device Manager for Intel® Stratix®10 Devices Provides FPGA and SoC Security.pdf
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Segment Routing Over IPv6 Acceleration Using Intel® FPGA Programmable Acceleration Card N3000.pdf
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Selecting Your Memory, External Memory Interface Handbook, Volume 2, Chapter 1.pdf
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Selecting the Correct High Speed Transceiver Solution.pdf
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Selecting the Ideal FPGA Vendor for Military Programs.pdf
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SerialLite Protocol Overview White Paper.pdf
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Shifting from Software to Hardware for Network Security.pdf
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Simplifying Simultaneous Multimode RRH Design.pdf
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Six Ways to Replace a Microprocessor With a CPLD.pdf
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Six Ways to Replace a Microprocessor With a CPLD.pdf
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Soft Multipliers For DSP Applications White Paper.pdf
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Strategic Considerations for Emerging SoC FPGAs.pdf
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Stratix GX & Switch Fabric Systems White Paper.pdf
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Stratix GX in Storage Applications White Paper.pdf
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Stratix II DDR2 System Validation Summary.pdf
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Stratix II DSP Performance.pdf
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Stratix II vs. Virtex-4 Density Comparison White Pap.pdf
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Stratix II vs. Virtex-4 Power Comparison & Estimation Accuracy White Paper.pdf
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Stratix III FPGA Signal Integrity.pdf
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Stratix III FPGAs vs. Xilinx Virtex-5 Devices: Architecture and Performance Comparison.pdf
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Stratix III Programmable Power.pdf
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Stratix vs. Virtex-II Pro FPGA Performance Analysis.pdf
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Streaming Multichannel Uncompressed Video in the Broadcast Environment.pdf
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Supercharging Design Performance and Productivity with Altera FPGAs and Best-in-Class IP.pdf
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Superior CPRI over OTN Front-haul Solutions.pdf
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Support All Industrial Ethernet Standards on Your Next "Drive" Design White Paper.pdf
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Support All Industrial Ethernet Standards on Your Next "Drive" Design White Paper.pdf
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Supporting Digital Television Trends with Next-Generation FPGAs.pdf
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Supporting Enterprise-Grade Flash with Programmable State Machines.pdf
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Supporting Unknown FREF Video Applications With PLLs.pdf
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Synchronizing Mechatronic Systems in Real-Time Using FPGAs and Industrial Ethernet Communications.pdf
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Synchronous Ethernet Solutions with Altera FPGAs and Silicon Labs Jitter-Attenuating PLLs White Paper.pdf
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System Design with Advance FPGA Timing Models.pdf
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System Trace Macrocell Packs Major Benefits for High-Performance SoC System Debug.pdf
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System-Level Debugging and Monitoring of FPGA Designs.pdf
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Taking Advantage of Advances in FPGA Floating-Point IP Cores.pdf
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The "Energy Aware" Appliance Platform: A New Approach To Home Energy Control.pdf
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The Altera DDR & DDR2 SDRAM Controller Compiler Frequently Asked Questions (FAQ) white paper.pdf
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The Benefits of Altera’s High-Speed DDR SDRAM Memory Interface Solution.pdf
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The Breakthrough Advantage for FPGAs with Tri-Gate Technology White Paper.pdf
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The Emerging Need for Fronthaul Compression.pdf
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The Evolution of High-Speed Transceiver Technology.pdf
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The Expanding Role of FPGAs in DSP Applications White Paper.pdf
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The JBlaster Software Driver: An Embedded Solution to the JTAG Configuration.pdf
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The Need for Dynamic Phase Alignment in High-Speed FPGAs White Paper.pdf
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The Quest for Digital Broadcast Quality: Addressing Quality Hot Spots.pdf
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The efficiency of the Altera DDR & DDR2 SDRAM Controller Compiler white paper.pdf
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TimeQuest Timing Analyzer: Native SDC Support for Timing Analysis of FPGA-Based Designs.pdf
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Tips and Techniques for 28-nm Design Optimization.pdf
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Traffic Management for Testing Triple-Play Services.pdf
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Traffic Management in Stratix GX Devices White Paper.pdf
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Transferring High-Speed Data over Long Distances with Combined FPGA and Multichannel Optical Modules.pdf
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Transient Voltage Protection for Stratix GX Devices.pdf
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Turning Video Analytics into Business Value.pdf
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Understanding 40-nm FPGA Solutions for SATA/SAS.pdf
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Understanding How the New HyperFlex™ Architecture Enables Next-Generation High-Performance Systems.pdf
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Understanding Metastability in FPGAs.pdf
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Understanding Peak Floating-Point Performance Claims.pdf
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Understanding Single Event Functional Interrupts in FPGA Designs.pdf
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Understanding and Meeting FPGA Power Requirements White Paper.pdf
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User-Customizable ARM-Based SoCs for Next-Generation Embedded Systems.pdf
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Using 10-Gbps Transceivers in 40G/100G Applications.pdf
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Using Cyclone III FPGAs for Clearer LCD HDTV Implementation.pdf
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Using Cyclone III FPGAs for Emerging Wireless Applications.pdf
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Using External Memory Interfaces to Achieve High-Speed Memory Solutions.pdf
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Using FPGA-Based Channel Bonding for HDTV Over DSL.pdf
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Using FPGAs to Render Graphics and Drive LCD Interfaces.pdf
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Using Floating-Point FPGAs for DSP in Radar.pdf
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Using LEDs as Light-Level Sensors and Emitters.pdf
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Using Parity to Detect Errors White Paper.pdf
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Using Pre-Emphasis and Equalization with Stratix GX.pdf
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Using Stratix GX in HDTV Video Production Applications.pdf
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Using Zero-Power CPLDs to Substantially Lower Power Consumption in Portable Applications.pdf
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Using Zero-Power CPLDs to Substantially Lower Power Consumption in Portable Applications.pdf
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Using the Intel Flash Memory-Based EPC4, EPC8 & EPC16 Devices.pdf
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Using the Quartus II Software to Maximize Performance in the HyperFlex Architecture.pdf
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Utilizing Leveling FPGAs in DDR3 SDRAM Memories.pdf
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Versatile Digital QAM Modulator.pdf
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Video Processing on FPGAs for Military Electro-Optical/Infrared Applications.pdf
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Video Streaming with Near-Zero Latency Using Altera Arria V FPGAs and Video and Image Processing Suite Plus the Right Encoder.pdf
|
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Video and Processing Design Using FPGAs.pdf
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Voltage Regulator Selection for FPGAs.pdf
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Zynq to SoC FPGA Design Migration Tips and Techniques.pdf
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soc_design.book.pdf
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