Hard Processor System Technical Reference Manual: Agilex™ 3 SoCs

ID 848530
Date 6/23/2025
Public
Document Table of Contents

4.4.4.6. On-Chip RAM Clocks

The on-chip RAM is driven by the mpu_ccu_clk interconnect clock.
Source Functional Usage Value
mpu_ccu_clk RAM AXI interconnect clock mpu_ccu_clk is 1/2 of the mpu_clk
The on-chip RAM ECC registers operate on a different clock domain.
Source Functional Usage Value
mpu_periph_clk ECC register interface clock mpu_periph_clk is 1/4 of the mpu_clk