4.1. Intel® Quartus® Prime Standard Edition
You can generate a Nios® V processor example design from the IP Parameter Editor in Platform Designer. Select the example design and download the zip file into your specified directory.
The example designs provide scripts that allow you to automate the example design generation, build both a BSP project and a simple application project. The example designs are preset to an Intel FPGA device.
Follow these steps to acquire the Nios® V processor example design:
- Open the Intel® Quartus® Prime Standard Edition software.
- Search for Nios V Processor Intel FPGA IP in the IP Catalog.
- Click Add to open the IP Parameter Editor of the Nios® V processor.
- Create a dummy Platform Designer system.
- Select one of the available design example options.
Figure 3. IP Catalog
Figure 4. Example Design in IP Parameter Editor
Alternatively, you can generate the example design through command line.
ip-generate --component-name=intel_niosv_m --file-set=<design name>
The following are the available design names.
- hello_world_example_design
- gsfi_bootloader_example_design
- uc_tcp_ip_iperf_example_design
- uc_tcp_ip_sss_example_design
Note: Use ip-generate.exe in Windows*.