AN 973: Three-phase Boost Bidirectional AC/DC Converter for Electric Vehicle (EV) Charging
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Ixiasoft
Visible to Intel only — GUID: fna1654720376737
Ixiasoft
6.1. Generating HDL and QPF Using MATLAB Scripts
The model to generate HDL code for FPGA used in this design example is the Simulink fixed-point model contained in the bidir_rectifier.slx, named bidir_rectifier_fixed.
Follow these instructions to generate an Intel® Quartus® Prime software project and HDL using HDL coder for Intel® MAX® 10 FPGA Development Kit or Cyclone® V SoC Development Kit:
- Navigate to the matlab/Simulink directory and open one of the following files:
- Cyclone® V SoC Development Kit: hdlworkflow_c5.m to generate an Intel® Quartus® Prime software project and VHDL code for the three-phase boost bidirectional AC/DC converter for EV charging.
- Intel® MAX® 10 Development Kit: hdlworkflow_m10.m to generate an Intel® Quartus® Prime software project and VHDL code for the three-phase boost bidirectional AC/DC converter for EV charging.
- Click Run to execute the script in the MATLAB interface.
Figure 19. Run MATLAB Script to Generate a ProjectRunning the HDL workflow script generates the hdl_prj_c5/quartus_prj for Cyclone® V or hdl_prj_m10/quartus_prj (for Intel® MAX® 10) inside the matlab/Simulink directory. These newly created directories contain a full Intel® Quartus® Prime software project similar to the one delivered in this design example. This flow helps regenerate the HDL if you want to modify the model. The directory named hdl_prj_x/hdlscr is the newly generated HDL for the three-phase boost bidirectional AC/DC converter for EV charging based on the fixed-point Simulink model.