Agilex™ 7 General-Purpose I/O User Guide: F-Series and I-Series

ID 683780
Date 7/08/2024
Public
Document Table of Contents

2.5.4. I/O Pins Placement Requirements

  • Only DQS pins support differential voltage referenced input standard.
  • Each ×4 DQ group shares the same OE and Reset signal. You must not split the OE and Reset signal within each ×4 DQ group. However, you can implement a separate clock-enable signal between the input and output paths within the same ×4 DQ group. Each input or output path within a ×4 DQ group must share the same Clock Enable signal. For example, if you use 2 pins from a ×4 DQ group as the input path while the other 2 pins as the output path, you can create one Clock Enable signal shared between the 2 input paths and another Clock Enable signal shared between the 2 output paths.
Figure 17. Example of OE, Reset, and Clock Enable Signals Sharing for a ×4 DQ Group in a Pinout File