Mailbox Client IPs User Guide

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ID 683290
Date 9/29/2025
Public
Document Table of Contents
Document Table of Contents x
1. Mailbox Client IPs User Guide 2. Appendix: CONFIG_STATUS and RSU_STATUS Error Code Descriptions
1. Mailbox Client IPs User Guide x
1.1. Release Information 1.2. Device Family Support 1.3. Parameters 1.4. Mailbox Client IP Core Interface Signals 1.5. Mailbox Client IP Avalon® Memory-Mapped Interface 1.6. Commands and Responses 1.7. Specifying the Command and Response FIFO Depths 1.8. Enabling Cryptographic Services 1.9. SEU Injection and Reporting Using the Mailbox Client IP 1.10. Using the Mailbox Client IP 1.11. Accessing Quad SPI Flash Mailbox Client IP Core Use Case Examples 1.12. Nios® II and Nios® V Processors HAL Driver 1.13. Mailbox Client IP User Guide Archives 1.14. Document Revision History for the Mailbox Client IP User Guide
1.4. Mailbox Client IP Core Interface Signals x
1.4.1. Clock and Reset Interfaces 1.4.2. Avalon® Memory-Mapped Interface 1.4.3. AXI Manager Interface
1.5. Mailbox Client IP Avalon® Memory-Mapped Interface x
1.5.1. Interrupt Enable Register 1.5.2. Interrupt Status Register 1.5.3. Timer Registers
1.6. Commands and Responses x
1.6.1. Operation Commands 1.6.2. Error Code Responses 1.6.3. Error Code Recovery
1.9. SEU Injection and Reporting Using the Mailbox Client IP x
1.9.1. Performing a Safe SEU Error Injection 1.9.2. Performing an ECC Error Injection
1.12. Nios® II and Nios® V Processors HAL Driver x
1.12.1. Mailbox Client HAL API 1.12.2. LibRSU HAL API
1.12.1. Mailbox Client HAL API x
1.12.1.1. Mailbox Client Driver API
1.12.2. LibRSU HAL API x
1.12.2.1. Configuration Parameter 1.12.2.2. Error Codes 1.12.2.3. Using LibRSU HAL API without Valid SPT or CPB 1.12.2.4. Data Type 1.12.2.5. Functions 1.12.2.6. RSU Client API
1. Mailbox Client IPs User Guide
2. Appendix: CONFIG_STATUS and RSU_STATUS Error Code Descriptions

1.9.2. Performing an ECC Error Injection

To learn more about ECC error injection, refer to INSERT_ECC_ERROR in the Operation Commands section.

To perform an ECC Error Injection, do the following:

  1. Run the quartus_fid command with the following syntax to list the valid Sector Index and RAM ID for ECC error: 
    quartus_fid -c 1 -i "@1=<sof_file>" --ecc_list
  2. Send an INSERT_ECC_ERROR [0x42] mailbox command to perform an ECC error injection.

    Refer to the listed Sector Index and RAM ID obtained in the previous step (Step 1) to assign the Sector Address and RAM_ID when sending this INSERT_ECC_ERROR [0x42] mailbox command.

  3. Send a READ_SEU_ERROR[0x3C] mailbox command to retrieve the Error Message Queue content.
    Note: Do not use this mailbox command if your design contains the Advanced SEU Detection IP.
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