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Intel® Intrinsics Guide

Updated Version
07/12/2024 3.6.9

Instruction Set

MMX

SSE family

SSE

SSE2

SSE3

SSSE3

SSE4.1

SSE4.2

AVX family

AVX

F16C

FMA

AVX2

AVX_VNNI

AVX_VNNI_INT8

AVX_NE_CONVERT

AVX_IFMA

AVX_VNNI_INT16

SHA512

SM3

SM4

AVX-512 family

AVX-512F

AVX-512BW

AVX-512CD

AVX-512DQ

AVX-512IFMA52

AVX-512VL

AVX-512VPOPCNTDQ

AVX-512_BF16

AVX-512_BITALG

AVX-512_VBMI

AVX-512_VBMI2

AVX-512_VNNI

AVX-512_VP2INTERSECT

AVX-512_FP16

AMX family

AMX-BF16

AMX-INT8

AMX-TILE

AMX-FP16

AMX-COMPLEX

SVML

Other

Categories

Download: Offline Intel® Intrinsics Guide

Additional resources:

Intel® C++ Compiler Classic Developer Guide and Reference
Intel® C++ Compiler community board

All throughput and latency data is sourced from Intel® 64 and IA-32 Architectures Software Developer Manuals .

Loading intrinsics data ...

This intrinsic generates a sequence of instructions, which may perform worse than a native instruction. Consider the performance impact of this intrinsic.

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