Where to Find the Release
You can get the latest version of Intel® oneAPI DPC++/C++ Compiler as part of the Intel® oneAPI Toolkit, or as a Stand-Alone download.
If you have Priority Support for Intel® oneAPI Toolkit or any other oneAPI toolkit (i.e. an unexpired free license or a paid license with active support at the time of the build date for this product release), you can download the installer by logging in to Intel® Registration Center and selecting the appropriate product. You may need to create an account and/or register your product. For additional information please see: Product Registration and Sign-Up FAQ
| Release Version | Release Date |
| 2026.0 | April 29, 2026 |
New in this Release
2026.0
Highlights
- The Intel® oneAPI DPC++/C++ Compiler 2026.0 is fully enabled and ready to deliver strong performance on Clearwater Forest and Wildcat Lake processors, while also boosting execution efficiency without requiring code changes on Intel® Core™ Ultra and Intel® Arrow Lake platforms through enhanced code generation such as improved branch prediction, along with greater control and correctness for host and offload execution, all without requiring changes to existing source code.
- Faster build and iteration cycles through runtime performance improvements, including quicker AOT linking, helping developers scale large applications with less compile and link overhead.
- More expressive and portable SYCL* development with enhanced free function kernel support, new device‑type query extensions, and expanded SYCL Graph capabilities using work‑group scratch memory, enabling cleaner code and more efficient execution across devices.
- Clearer insight into compiler optimizations and offload behavior with function‑scoped optimization reporting, plus new reports for reduction optimizations and ND‑range partitioning, making performance tuning more targeted and actionable.
- Greater control during performance tuning and debugging through new compiler options that allow developers to explicitly enable or disable loop optimizations when isolating issues or experimenting with transformations.
- More predictable and robust host and offload execution with added fallback controls for need_device_ptr handling and new scan support for scalars in non‑SIMD host parallel loops, improving correctness across heterogeneous workloads.
- A cleaner, more future‑ready programming model with removal of deprecated target variant dispatch and subdevice support, simplifying development and aligning with modern SYCL and offload best practices.
-
Microsoft Visual Studio* 2026 support is available in the Compiler IDE extensions (C++, DPCPP). This feature was introduced in the 2025.3.1 patch release and is included in the 2026.0.0 release. Users can continue to use existing workflows without any changes.
Major New Features and Enhancements
Compiler Code Generation and Optimization
- New CPU Targeting Options (Intel® Core™ and Xeon® Platforms) Added support for new ISA and microarchitecture targeting options, including
-xapxf,-xavx10.1, and-xavx10.2, as well as Nova Lake and Wildcat Lake specific flags (-xNOVALAKE,-march=novalake, and corresponding Windows/Qxand/archoptions), enabling early performance tuning and platform enablement on upcoming Intel® processors. - Improved Branch Prediction Optimizations Enhanced compiler heuristics for the branch prediction unit (BPU), improving execution efficiency on Panther Lake and Arrow Lake processors.
-
Fine-Grained Loop Optimization Control New compiler options allow enabling or disabling individual loop transformations:
- Loop interchange:
-f[no]-loop-interchange - Loop blocking:
-f[no]-loop-blocking - Loop collapsing:
-f[no]-loop-collapsing - Loop distribution:
-f[no]-loop-distribution - Loop fusion:
-f[no]-loop-fusion - Loop predicate optimization:
-f[no]-loop-predicate-optimization=[enable|disable|aggressive] - Loop multiversioning:
-f[no]-loop-multiversioning - Loop unroll-and-jam:
-f[no]-loop-unroll-and-jam - Loop scalar replacement:
-f[no]-loop-scalar-replacement or -scalar-rep (legacy option from ICC
These options support performance experimentation and can be used as workarounds for compile-time or stability issues.
- Loop interchange:
-
Focused Optimization Reporting Added
-qopt-report-routine(Linux) //Qopt-report-routine(Windows) to restrict optimization reports to one or more named functions.The argument accepts a single function name or a comma-separated list. Name matching is substring-based (e.g., =test matches test, test1, mytest) and respects the mangled/unmangled setting of -[qQ]opt-report-names. Functions not matching the filter are excluded; inlining reports cover only functions inlined into the selected function(s). This helps developers focus large optimization reports on specific functions of interest.
Examples of usage:
Linux
icpx -O3 -qopt-report-names=unmangled -qopt-report-routine=foo,bar,baz myfoo.cpp
icpx -O3 -qopt-report-names=mangled -qopt-report-routine=_Z3foov myfoo.cpp
Windows
icx /O3 /Qopt-report-names:unmangled /Qopt-report-routine:foo,bar,baz myfoo.cpp
icx /O3 /Qopt-report-names:mangled /qopt-report-routine:_Z3foov myfoo.cpp
OpenMP Enhancements
- Added support for OpenMP 6.0 extended
prefer_typesyntax, enabling additional attributes for interop objects. - Added support for OpenMP 6.1 fallback specifiers
fb_nullifyandfb_preserveforneed_device_ptrin variant functions. - Added optimization reports for:
- Reduction optimizations
- ND-range partitioning during offload
- Added support for
scanon scalar variables in non-SIMD host parallel loops.
SYCL* Language, Runtime, and Libraries
SYCL Standards and Core Language
- Introduced a prototype implementation of
sycl_khr_includes, enabling composable include‑file conventions for SYCL headers.
This extension is disabled by default, requires explicit opt‑in, and is intended for early feedback only. - Fully enabled
sycl_khr_group_interfacewithout requiring__DPCPP_ENABLE_UNFINISHED_KHR_EXTENSIONS. - Simplified SYCL headers to reduce compile‑time overhead when including
<sycl/sycl.hpp>. - Improved diagnostics for kernel argument validation and kernel property conflicts.
- Removed fallback assertions for devices that do not report the
ext_oneapi_native_assertaspect, aligning behavior with SYCL 2020.
oneAPI SYCL Extensions
- Added
sycl_ext_oneapi_platform_device_indexfor querying a device’s index within its parent platform. - Added
sycl_ext_oneapi_device_is_integrated_gputo query whether a device is an integrated GPU. - Improved
platform::get_devicesbehavior for custom and automatic selectors. - Added
sycl_ext_oneapi_device_wait, providing a device‑side wait mechanism. - Added
sycl_ext_oneapi_device_default_context, exposing a stable default SYCL context per device. - Improved performance of
sycl_ext_oneapi_submit_barrierby using an empty wait list. - Added
sycl_ext_oneapi_usm_shortcutsto simplify USM allocation and memory copy operations. - Added inter‑process communicable memory support via
sycl_ext_oneapi_inter_process_communication. - Added USM prefetch direction control (host‑to‑device, device‑to‑host) in
sycl_ext_oneapi_enqueue_functions. - Fixed memory access issues involving default accessors and deallocated regions.
- Added
sycl_ext_oneapi_clock, providing access to device hardware clock counters. - Implemented device kernel information support for interop kernels.
Specifications for all SYCL extensions can be found at https://github.com/intel/llvm/tree/sycl/sycl/doc/extensions.
SYCL Graph
- Added handler‑less graph submission and handler‑less kernel submission, including
single_task. - Added graph‑owned memory allocations.
- Added work‑group scratch memory size control within graph nodes via
sycl_ext_oneapi_work_group_scratch_memory. This capability was requested by the PyTorch community to enable efficient scratch memory usage in graph‑captured kernels. - Added graph recording support for handler‑less kernel submissions.
- Added a new
modifiable_command_graphconstructor accepting a default context. - Improved graph finalization and duplication performance.
- Retained queue handles after cleanup to reduce overhead.
SYCL Free Function Kernels
- Improved handling of templated kernel arguments, alias‑typed arguments, and integer‑expression templates.
- Added support for kernel arguments that are structs containing special SYCL types.
- Enabled use of
sycl_ext_oneapi_work_group_scratch_memoryin free function kernels. - Implemented
info::kernel::num_argsfor free function kernels. - Added new Clang diagnostics for illegal free function kernel argument types.
SYCL Runtime and Performance
- Reduced SYCL runtime and library overhead over Unified Runtime (UR), improving:
- Kernel submission latency
- Runtime throughput
- Overall application startup time
SYCLBIN and Build Workflow
- Added SYCLBIN “fast linking,” allowing AOT‑compiled device binaries to be dynamically linked at runtime, reducing startup latency.
- Updated image selection logic so only native device images are used when the target state is executable.
Math Libraries and Numerics
- Added
tanhsupport forbfloat16in the bfloat16 math library. - Added Intel‑specific
sigmoiddevice math function. - Added
std::hashandstd::numeric_limitsspecializations forbfloat16.
Debugging and Tooling
- Updated GDB debug information for
sycl::handler. - Introduced
--persistent-auto-pchand--auto-pchoptions for SYCL runtime compilation (RTC). - Improved sanitizer support:
- AddressSanitizer, MemorySanitizer, and ThreadSanitizer coverage and correctness
- Better bfloat16 and complex builtin handling
- Improved support for indirect memory access patterns
Misc
- Introduced the
INTEL_PROFILE_DIRenvironment variable to control where raw PGO profiles are written. - When compiling with
-qmkl,-qtbb, or both alongside-fsycl, the compiler now links againstlmkl_intel_lp64by default. The SYCL runtime continues to link against SYCL-specific oneMKL libraries. This improves consistency between host and device code paths.
Bug Fixes:
- Resolved hangs, crashes, and incorrect behavior related to graph-owned memory allocations, property handling, and reductions inside graphs.
- Fixed deadlocks, race conditions, and lock/wait issues across runtime shutdown, kernel program cache, and SYCL library shutdown.
- Fixed memory leaks (sub-devices, Windows), dangling pointers, use-after-move in kernel_bundle, and Windows library/runtime unloading issues.
- Resolved crashes caused by enum kernel arguments, early kernel/program release, and AOT compilation with dynamic library dependencies (
-fsycl-allow-device-image-dependencies). - Fixed bfloat16 conversion errors and improved complex math function accuracy (e.g.,
tanhaccumulated error). - Fixed ODR violations, host compilation failures, and incorrect dead argument elimination; improved SYCLBIN image selection and fast-linking stability.
- Improved sanitizer coverage (AddressSanitizer, MemorySanitizer, ThreadSanitizer), GDB debug information for SYCL host-side execution, and fixed incorrect asynchronous exception behavior.
API / ABI Breaking Changes
Important: This is an ABI/API breaking release.
- All applications using earlier oneAPI SYCL runtimes must be rebuilt.
sycl::vechas a new implementation; binary compatibility is not preserved.- Reduced exported symbols in
sycl::handler. - Promoted previously announced breaking changes affecting:
- Kernel submission APIs
- Reductions
- Device kernel information
- Kernel naming and queue submission behavior
- Simplified
interop_handleconstructor by removingsycl::deviceandsycl::contextparameters.
Migration guidance for these breaking changes is available in SYCL Breaking Changes in Intel® oneAPI DPC++/C++ Compiler 2026.0.
Deprecation and Removal Notices
- Removed deprecated compiler options:
-fsycl-device-lib-fsycl-device-lib-jit-link
- Removed deprecated FPGA-related SYCL extensions.
- Removed SYCLcompat library.
- Removed deprecated SYCL Graph APIs, legacy enqueue functions, kernel launch queries, and host-side kernel instantiation mechanisms.
- Removed deprecated OpenMP extensions:
- Target variant dispatch construct
- Non-standard
subdeviceclause
Known Issues and Limitations
- Level Zero v2 Adapter
- When using the L0 v2 adapter,
make_queue()only accepts in-orderze_command_list_handle_t. - Out-of-order command lists result in undefined behavior.
- L0 v2 is used by default on Xe2 and newer GPUs (e.g., Battlemage, Lunar Lake, Arrow Lake).
- When using the L0 v2 adapter,
- SYCL Header Macro Conflicts
- Some unreserved identifiers (e.g.,
G,VL) may conflict with user-defined macros.
- Some unreserved identifiers (e.g.,
- ESIMD and
-O0- ESIMD code is always optimized, even when compiling with
-O0..
- ESIMD code is always optimized, even when compiling with
- Virtual Function Limitations
- Incomplete support for optional kernel features and AOT compilation.
System Requirements
Note: Minor releases (e.g., 2026.1) automatically inherit all OS requirements from the base major release (2026.0).Only operating systems marked with (+) are newly added in that minor release, and those marked with (–) are removed. Asterisks(**) indicates Deprecations. All others remain unchanged and are not duplicated in the table.
Hardware Requirements
|
Release Version |
RAM |
Memory Requirements |
Supported CPUs |
Supported GPUs |
|
2026.0(Baseline) |
At least 16 GB recommended for CPU and GPU development |
NOTE: During the installation process, the installer may need up to 6 GB of additional temporary disk storage to manage the download and intermediate installation files. |
Systems based on Intel® 64 architectures below are supported both as host and target platforms.
|
|
Supported Operating Systems
Note: These OS distributions are tested by Intel or known to work; other distributions may or may not work and are not recommended. If you have questions, access the Intel Community Forums when you need assistance. If you have Commercial Support, create a support ticket.
|
Release Version |
Hardware |
Linux |
Windows |
|
2026.0 |
For CPU |
|
|
| For GPU |
|
|
Supported IDEs
Eclipse*
- Eclipse 2025-12-R
Microsoft Visual Studio*
- Microsoft Visual Studio* 2022 17.14.27 with 'Desktop development with C++' component installed
- Microsoft Visual Studio* 2025 18.3.2 with 'Desktop development with C++' component installed
Software Requirements
- Linux kernel 4.11 or higher
- Supported minimum versions of distributed libraries that the compilers are built on: GCC - 7.5.0, BINUTILS- 2.30, GLIBC-2.28, G++ - 7.5.0.
- If the highest version of GNU gcc used doesn't have the equivalent g++ package installed, the customer will run into an error. For further details, please check this article--fatal error: <C++ header> file not found with Intel® oneAPI DPC++/C++ Compiler
For GPU: Level 0 and OpenCL graphics drivers
- To install the Linux General Purpose Intel GPUs (GPGPU) Driver, see the installation guide and follow the directions for your device.
| Release | Linux Driver | Windows Driver |
| 2026.0 |
Supported driver versions with oneAPI 2026.0 for Intel® Data Center GPUs: Intel® Client GPUs: |
|
-
You must have the latest drivers to collect GPU usage events and processor graphics hardware events on Windows*. Request drivers from Intel® Support or download them here.
-
Requirements to compile DPC++ applications: You must compile DPC++ applications with -gline-tables-only and -fdebug-info-for-profiling options to ensure the availability of debug information for performance analysis.
Graphics Driver Installation
-
Windows Intel® Graphics Driver
To install the driver follow the directions in the article appropriate for your device- Intel® Arc™ Graphics, 11th-13th Gen Intel® Core™ processor directions.
- Xe Dedicated, 6th-10th Gen Intel® Core™ Processor Graphics, and related Intel Atom®, Pentium®, and Celeron® processors directions. Driver version varies depending on the Intel® Graphics in the system.
- Intel® Data Center GPU Flex Series (ATS-M). Contact your OEM representative for access to the Intel® Registration Center.
- Linux General Purpose Intel® GPUs (GPGPU) Driver
For all Intel® GPUs, see this article, Overview, and follow the directions for your device.
C/C++ Standard
- Intel® oneAPI DPC++/C++ Compiler version 2026.0 supports the C/C++ standards through the Clang 22 front end.
Support Deprecated
- The following OS support is deprecated and will be discontinued with a future release
- For CPU:
- Windows Pro & Enterprise 10
- Windows Server 2019
- For GPU
- PVC:
- SLES15 SP4
- All other client GPU platforms:
- Ubuntu 25.10
- PVC:
- For CPU:
Support Removed
- The following OS is not longer supported for 2026.0
- For CPU
- SLES15 SP4, SP5
- Fedora 41
- Debian 11
- For GPU
- PVC:
- RHEL/Rocky 9.5
- ATS-M:
- RHEL/Rocky 9.5,
- Windows Server 2019
- All other client GPU platforms:
- Ubuntu LTS 25.04
- PVC:
- For CPU
- Support for Microsoft Visual Studio* 2019 has been discontinued starting from the 2026.0.0 release. Users are recommended to upgrade to a supported Visual Studio version (Microsoft Visual Studio* 2022 or later) to continue using the Compiler IDE extensions.
Additional Documentation
- Get Started with the Intel® oneAPI Toolkit for Linux*
- Get Started with the Intel® oneAPI Toolkit for Windows*
- OneAPI Versioning Schema
- Intel® oneAPI DPC++/C++ Compiler Developer Guide and Reference
- Intel® oneAPI Programming Guide
Notices and Disclaimers
Intel optimizations, for Intel compilers or other products, may not optimize to the same degree for non-Intel products.
Intel technologies may require enabled hardware, software, or service activation.
No product or component can be absolutely secure.
Your costs and results may vary.
© Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Other names and brands may be claimed as the property of others.
No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document.
The products described may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request.
Intel optimizations, for Intel compilers or other products, may not optimize to the same degree for non-Intel products.
Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from a course of performance, course of dealing, or usage in trade.