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| Release Version | Release Date |
| 2026.2.0 | October 22, 2026 |
| 2026.1.1 | July 29, 2026 |
| 2026.1.0 | July 7, 2026 |
| 2026.0.0 | April 29, 2026 |
2026.2.0
New Features and Enhancements
Compiler Code Generation and Optimization
- Enhanced HWPGO Pseudo-Probe infrastructure for branch misprediction optimization
- Introduced a new option [-f,/Q]imf-precision=correctly-rounded[:funclist] that offers dedicated correctly rounded (CR) math function support including built-in vectorization
- Introduced a Windows counterpart of -falign-loops, i.e. /Qalign-loops:N
- Implemented an optimization that allows transferring computation to vector registers for scalar operations
- Improved cmov generation heuristics, reducing the amount of bad speculation
- New options [-f,/Q]disable-fp-invariant-reassociation which disable a specific optimization that may reduce floating-point stability when the "fast" FP model is used. The options have no effect when other floating-point models are used
OpenMP Enhancements
- New option [-f,/Q]openmp-vector-aware-collapse for OpenMP collapse vectorization, which may enable more efficient loop vectorization
- const-qualified variables in target directives are now mapped as 'to' instead of 'tofrom' conforming to OpenMP 6.0. const variables without mutable members will no longer be copied back from the device, reducing unnecessary data transfers. struct types with mutable members continue to use 'tofrom' mapping
- Support for OpenMP 6.0 extensions to the 'prefer_type' modifier. In addition to naming a foreign runtime directly, users can now express a preference as a brace-enclosed group of properties, specifying a foreign runtime along with the attributes they would like the runtime to provide. This gives finer-grained control over how an interop object is initialized when a program can work with more than one foreign runtime. The extended syntax is accepted both in the init clause of #pragma omp interop and in append_args on #pragma omp declare variant
- Support for the OpenMP 6.0 reverse loop transformation construct. This executes the iterations of an associated loop in the opposite order. It is supported with both '-fopenmp' and '-fiopenmp', including for offloaded target regions
- Support OpenMP 6.0 transparent clause on a task/taskloop construct. It allows a user to specify task dependencies not just between sibling tasks, but also between tasks from different generations (e.g., from a parent task to a child task)
- Support OpenMP 6.0 threadset clause on a task/taskloop construct. It allows tasks to run on free-agent threads
- Support the lower-bound modifier in the num_teams clause. It allows a user to specify the minimum number of teams to be created for a teams construct
SYCL* Language, Runtime, and Libraries
- New option -ftime-trace for SYCL offloading compilation, enabling detailed JSON trace files for both host and device (spir64) compilation phases. Trace files are named with clear offloading prefixes to avoid filename collisions (e.g. -host-x86_64-unknown-linux-gnu and -sycl-spir64-unknown-unknown). Supported in both new (--offload-new-driver) and legacy driver models. Developers can load the
.jsonoutput inchrome://tracingor Perfetto to identify and optimize slow compilation paths in SYCL applications. - Added support for PreCompiled Headers (PCH) with SYCL. PCH files could not previously be created or used with SYCL, that restriction is now lifted. PCH files can now be created, e.g. with: icpx -fsycl -c -x c++-header header.h. This precompiles the header file header.h once each for the device target(s), and once for the host. The individual pch files generated are then combined into a single header.pchi binary. PCH files can be used with clang -fsycl -c -include-pch header.pchi file.cpp. This unbundles the combined header.pchi binary into its respective target components and uses the respective pchi files in the device target and host compilations
- Added support for re-use of SYCL event objects to track completion of multiple command submissions, rather than creating a new event for each submission. An event object is still only able to track one command at a time, but this extension allows an event to track a new command once the application no longer needs to track the previous one. This pattern may perform better on some implementations because fewer event objects need to be created and destroyed
- Support for sycl_ext_oneapi_register_host_memory extension which allows registering regular host memory with the SYCL runtime so it is promoted to USM host memory, enabling kernel access and potentially optimizing explicit copies between registered host memory and USM device memory. This only works with L0 backend on Battlemage or newer Intel GPUs.
- Support for linking a SYCLBIN object bundle together with a runtime‑compiled SYCL source bundle preserves and executes kernels from both bundles in the resulting executable kernel_bundle.
- Implemented sycl_khr_queue_flush Khronos® extension and also implemented Khronos® change to support *_vector_width_long_long
- Support for cl_intel_bfloat16 extension on CPU device. This extension adds support for the BFloat16 (Brain Floating Point) data type to OpenCL. The BFloat16 type is a 16-bit floating-point format designed for machine learning and AI workloads, offering a balance between range and precision
- Support for cl_intel_16bit_atomics extension on CPU device. This extension enables programmers to perform atomic operations on 16-bit numbers in memory
- OpenCL 3.1 specification is now fully supported. This specification is published by Khronos® OpenCL Working Group on 22 May 2026
-
Included new extensions supported by Khronos® SPIR-V translator: SPV_INTEL_subgroup_scaled_matrix_multiply_accumulate, SPV_INTEL_subgroup_matrix_multiply_accumulate_float8, SPV_INTEL_subgroup_buffer_prefetch, SPV_INTEL_rounded_divide_sqrt
Misc
- Selective libtbb linking for C++ compilations using the --as-needed linker flag, to automatically include the libtbb library. This ensures libtbb is linked if one or more TBB symbols are referenced in the generated binary
2026.1.1
New Features and Enhancements
- Restricted host tasks (sycl::ext::oneapi::experimental::host_task) can now be captured while SYCL Graph native recording mode is active
- Added command_graph::get_id() to query a process-unique graph ID during SYCL Graph recording
2026.1.0
New Features and Enhancements
- Extended sycl_ext_intel_device_info by adding support of new queries for Intel GPUs based on Xe architecture
- Added a new native recording mode to the sycl_ext_oneapi_graph extension, activated via the enable_native_recording property on the command_graph constructor
- Improved support of volatile variables in context of setjmp function
- Added the -fopenmp-loop-threadization-level option to empower the user to tune performance of OpenMP loop constructs
- Support for OpenMP requires unified_shared_memory directive that simplifies ports of applications from CPU to GPU taking advantage of shared system USM
- Implemented Intel® Advanced Vector Extensions 10.2 (Intel® AVX10.2) optimizations for the Short Vector Math Library (SVML), bringing substantial performance improvements for vectorized mathematical functions on platforms with Intel® AVX10.2 support
- Compiler driver no longer forces preserve-sign denormal flushing by default for SYCL/OpenMP offload device compilation, while keeping host behavior unchanged and preserving explicit user overrides
- Significantly improved performance of sycl_ext_oneapi_get_kernel_info extension
- Improved offload performance of some workloads using the OpenMP target teams if(cond) construct
Bug Fixes
- Fixed a compilation failure caused by kernels using the sycl::ext::oneapi::experimental::nd_launch API with unnamed lambdas, which was incompatible with -fsycl-host-compiler
2026.0.0
Highlights
- The Intel® oneAPI DPC++/C++ Compiler 2026.0.0 is fully enabled and ready to deliver strong performance on Clearwater Forest and Wildcat Lake processors, while also boosting execution efficiency without requiring code changes on Intel® Core™ Ultra and Intel® Arrow Lake platforms through enhanced code generation such as improved branch prediction, along with greater control and correctness for host and offload execution, all without requiring changes to existing source code.
- Faster build and iteration cycles through runtime performance improvements, including quicker AOT linking, helping developers scale large applications with less compile and link overhead.
- More expressive and portable SYCL* development with enhanced free function kernel support, new device‑type query extensions, and expanded SYCL Graph capabilities using work‑group scratch memory, enabling cleaner code and more efficient execution across devices.
- Clearer insight into compiler optimizations and offload behavior with function‑scoped optimization reporting, plus new reports for reduction optimizations and ND‑range partitioning, making performance tuning more targeted and actionable.
- Greater control during performance tuning and debugging through new compiler options that allow developers to explicitly enable or disable loop optimizations when isolating issues or experimenting with transformations.
- More predictable and robust host and offload execution with added fallback controls for need_device_ptr handling and new scan support for scalars in non‑SIMD host parallel loops, improving correctness across heterogeneous workloads.
- A cleaner, more future‑ready programming model with removal of deprecated target variant dispatch and subdevice support, simplifying development and aligning with modern SYCL and offload best practices.
-
Microsoft Visual Studio* 2026 support is available in the Compiler IDE extensions (C++, DPCPP). This feature was introduced in the 2025.3.1 patch release and is included in the 2026.0.0 release. Users can continue to use existing workflows without any changes.
Major New Features and Enhancements
Compiler Code Generation and Optimization
- New CPU Targeting Options (Intel® Core™ and Xeon® Platforms) Added support for new ISA and microarchitecture targeting options, including , , and , as well as Nova Lake and Wildcat Lake specific flags (, , and corresponding Windows and options), enabling early performance tuning and platform enablement on upcoming Intel® processors.
-xapxf-xavx10.1-xavx10.2-xNOVALAKE-march=novalake/Qx/arch - Improved Branch Prediction Optimizations Enhanced compiler heuristics for the branch prediction unit (BPU), improving execution efficiency on Panther Lake and Arrow Lake processors.
-
Fine-Grained Loop Optimization Control New compiler options allow enabling or disabling individual loop transformations:
- Loop interchange:
-f[no]-loop-interchange - Loop blocking:
-f[no]-loop-blocking - Loop collapsing:
-f[no]-loop-collapsing - Loop distribution:
-f[no]-loop-distribution - Loop fusion:
-f[no]-loop-fusion - Loop predicate optimization:
-f[no]-loop-predicate-optimization=[enable|disable|aggressive] - Loop multiversioning:
-f[no]-loop-multiversioning - Loop unroll-and-jam:
-f[no]-loop-unroll-and-jam - Loop scalar replacement:
These options support performance experimentation and can be used as workarounds for compile-time or stability issues.-f[no]-loop-scalar-replacement or -scalar-rep (legacy option from ICC
- Loop interchange:
-
Focused Optimization Reporting Added (Linux) / (Windows) to restrict optimization reports to one or more named functions.
-qopt-report-routine/Qopt-report-routineThe argument accepts a single function name or a comma-separated list. Name matching is substring-based (e.g., =test matches test, test1, mytest) and respects the mangled/unmangled setting of -[qQ]opt-report-names. Functions not matching the filter are excluded; inlining reports cover only functions inlined into the selected function(s). This helps developers focus large optimization reports on specific functions of interest.
Examples of usage:
Linux
icpx -O3 -qopt-report-names=unmangled -qopt-report-routine=foo,bar,baz myfoo.cpp
icpx -O3 -qopt-report-names=mangled -qopt-report-routine=_Z3foov myfoo.cpp
Windows
icx /O3 /Qopt-report-names:unmangled /Qopt-report-routine:foo,bar,baz myfoo.cpp
icx /O3 /Qopt-report-names:mangled /qopt-report-routine:_Z3foov myfoo.cpp
OpenMP Enhancements
- Added support for OpenMP 6.0 extended
prefer_typesyntax, enabling additional attributes for interop objects. - Added support for OpenMP 6.1 fallback specifiers and for in variant functions.
fb_nullifyfb_preserveneed_device_ptr - Added optimization reports for:
- Reduction optimizations
- ND-range partitioning during offload
- Added support for on scalar variables in non-SIMD host parallel loops.
scan
SYCL* Language, Runtime, and Libraries
SYCL Standards and Core Language
- Introduced a prototype implementation of , enabling composable include‑file conventions for SYCL headers.
This extension is disabled by default, requires explicit opt‑in, and is intended for early feedback only.sycl_khr_includes - Fully enabled without requiring .
sycl_khr_group_interface__DPCPP_ENABLE_UNFINISHED_KHR_EXTENSIONS - Simplified SYCL headers to reduce compile‑time overhead when including .
<sycl/sycl.hpp> - Improved diagnostics for kernel argument validation and kernel property conflicts.
- Removed fallback assertions for devices that do not report the aspect, aligning behavior with SYCL 2020.
ext_oneapi_native_assert
oneAPI SYCL Extensions
- Added for querying a device’s index within its parent platform.
sycl_ext_oneapi_platform_device_index - Added to query whether a device is an integrated GPU.
sycl_ext_oneapi_device_is_integrated_gpu - Improved behavior for custom and automatic selectors.
platform::get_devices - Added , providing a device‑side wait mechanism.
sycl_ext_oneapi_device_wait - Added , exposing a stable default SYCL context per device.
sycl_ext_oneapi_device_default_context - Improved performance of by using an empty wait list.
sycl_ext_oneapi_submit_barrier - Added to simplify USM allocation and memory copy operations.
sycl_ext_oneapi_usm_shortcuts - Added inter‑process communicable memory support via .
sycl_ext_oneapi_inter_process_communication - Added USM prefetch direction control (host‑to‑device, device‑to‑host) in .
sycl_ext_oneapi_enqueue_functions - Fixed memory access issues involving default accessors and deallocated regions.
- Added , providing access to device hardware clock counters.
sycl_ext_oneapi_clock - Implemented device kernel information support for interop kernels.
Specifications for all SYCL extensions can be found at https://github.com/intel/llvm/tree/sycl/sycl/doc/extensions.
SYCL Graph
- Added handler‑less graph submission and handler‑less kernel submission, including .
single_task - Added graph‑owned memory allocations.
- Added work‑group scratch memory size control within graph nodes via . This capability was requested by the PyTorch community to enable efficient scratch memory usage in graph‑captured kernels.
sycl_ext_oneapi_work_group_scratch_memory - Added graph recording support for handler‑less kernel submissions.
- Added a new constructor accepting a default context.
modifiable_command_graph - Improved graph finalization and duplication performance.
- Retained queue handles after cleanup to reduce overhead.
SYCL Free Function Kernels
- Improved handling of templated kernel arguments, alias‑typed arguments, and integer‑expression templates.
- Added support for kernel arguments that are structs containing special SYCL types.
- Enabled use of in free function kernels.
sycl_ext_oneapi_work_group_scratch_memory - Implemented for free function kernels.
info::kernel::num_args - Added new Clang diagnostics for illegal free function kernel argument types.
SYCL Runtime and Performance
- Reduced SYCL runtime and library overhead over Unified Runtime (UR), improving:
- Kernel submission latency
- Runtime throughput
- Overall application startup time
SYCLBIN and Build Workflow
- Added SYCLBIN “fast linking,” allowing AOT‑compiled device binaries to be dynamically linked at runtime, reducing startup latency.
- Updated image selection logic so only native device images are used when the target state is executable.
Math Libraries and Numerics
- Added support for in the bfloat16 math library.
tanhbfloat16 - Added Intel‑specific device math function.
sigmoid - Added and specializations for .
std::hashstd::numeric_limitsbfloat16
Debugging and Tooling
- Updated GDB debug information for .
sycl::handler - Introduced and options for SYCL runtime compilation (RTC).
--persistent-auto-pch--auto-pch - Improved sanitizer support:
- AddressSanitizer, MemorySanitizer, and ThreadSanitizer coverage and correctness
- Better bfloat16 and complex builtin handling
- Improved support for indirect memory access patterns
Misc
- Introduced the environment variable to control where raw PGO profiles are written.
INTEL_PROFILE_DIR - When compiling with , , or both alongside , the compiler now links against by default. The SYCL runtime continues to link against SYCL-specific oneMKL libraries. This improves consistency between host and device code paths.
-qmkl-qtbb-fsycllmkl_intel_lp64
Bug Fixes
- Resolved hangs, crashes, and incorrect behavior related to graph-owned memory allocations, property handling, and reductions inside graphs.
- Fixed deadlocks, race conditions, and lock/wait issues across runtime shutdown, kernel program cache, and SYCL library shutdown.
- Fixed memory leaks (sub-devices, Windows), dangling pointers, use-after-move in kernel_bundle, and Windows library/runtime unloading issues.
- Resolved crashes caused by enum kernel arguments, early kernel/program release, and AOT compilation with dynamic library dependencies ().
-fsycl-allow-device-image-dependencies - Fixed bfloat16 conversion errors and improved complex math function accuracy (e.g., accumulated error).
tanh - Fixed ODR violations, host compilation failures, and incorrect dead argument elimination; improved SYCLBIN image selection and fast-linking stability.
- Improved sanitizer coverage (AddressSanitizer, MemorySanitizer, ThreadSanitizer), GDB debug information for SYCL host-side execution, and fixed incorrect asynchronous exception behavior.
API / ABI Breaking Changes
Important: This is an ABI/API breaking release.
- All applications using earlier oneAPI SYCL runtimes must be rebuilt.
sycl::vechas a new implementation; binary compatibility is not preserved.- Reduced exported symbols in .
sycl::handler - Promoted previously announced breaking changes affecting:
- Kernel submission APIs
- Reductions
- Device kernel information
- Kernel naming and queue submission behavior
- Simplified constructor by removing and parameters.
interop_handlesycl::devicesycl::context
Migration guidance for these breaking changes is available in SYCL Breaking Changes in Intel® oneAPI DPC++/C++ Compiler 2026.0.0
Deprecation and Removal Notices
- Removed deprecated compiler options:
-fsycl-device-lib-fsycl-device-lib-jit-link
- Removed deprecated FPGA-related SYCL extensions.
- Removed SYCLcompat library.
- Removed deprecated SYCL Graph APIs, legacy enqueue functions, kernel launch queries, and host-side kernel instantiation mechanisms.
- Removed deprecated OpenMP extensions:
- Target variant dispatch construct
- Non-standard clause
subdevice
Known Issues and Limitations
- Level Zero v2 Adapter
- When using the L0 v2 adapter, only accepts in-order .
make_queue()ze_command_list_handle_t - Out-of-order command lists result in undefined behavior.
- L0 v2 is used by default on Xe2 and newer GPUs (e.g., Battlemage, Lunar Lake, Arrow Lake).
- When using the L0 v2 adapter, only accepts in-order .
- SYCL Header Macro Conflicts
- Some unreserved identifiers (e.g., , ) may conflict with user-defined macros.
GVL
- Some unreserved identifiers (e.g., , ) may conflict with user-defined macros.
- ESIMD and
-O0- ESIMD code is always optimized, even when compiling with ..
-O0
- ESIMD code is always optimized, even when compiling with ..
- Virtual Function Limitations
- Incomplete support for optional kernel features and AOT compilation.
- CUDA/HIP adapters
Starting in 2025.3 release, CUDA* and HIP* adapters for SYCL are no longer available in binary packages. Instead, they will be provided in source format together with the SYCL open-source compiler. To build it:git clone https://github.com/intel/llvm -b v6.3.0 --depth=1 cd llvm cmake -S unified-runtime -B build \ -DUR_BUILD_TESTS=OFF \ -DUR_ENABLE_TRACING=ON \ -DUR_BUILD_ADAPTER_OPENCL=ON \ -DUR_BUILD_ADAPTER_CUDA=ON \ # (or -DUR_BUILD_ADAPTER_HIP=ON) -DCMAKE_BUILD_TYPE=Release \ -DCMAKE_INSTALL_PREFIX="/opt/intel/unified-runtime/install" cmake --build build -j cmake --install buildOnce installed, the built plugins should be copied to the oneAPI installation directory:
cp /opt/intel/unified-runtime/install/lib/libur* $ONEAPI_ROOT/compiler/latest/lib 2>/dev/nullTo test them:
source $ONEAPI_ROOT/setvars.sh sycl-lsThis should list any Nvidia (or AMD) GPUs available in the system.
System Requirements
Note: Minor releases (e.g., 2026.1) automatically inherit all requirements from the base major release (2026.0). Only requirements marked with (+) are newly added in that minor release, and those marked with (–) are removed. Asterisks(**) indicates Deprecations. All others remain unchanged and are not duplicated in the table.
Hardware Requirements
|
Release Version |
RAM |
Memory Requirements |
Supported CPUs |
Supported GPUs |
|
2026.0.0 - 2026.2.0 |
At least 16 GB recommended for CPU and GPU development |
NOTE: During the installation process, the installer may need up to 6 GB of additional temporary disk storage to manage the download and intermediate installation files. |
Systems based on Intel® 64 architectures below are supported both as host and target platforms.
|
|
Supported Operating Systems
Note: These OS distributions are tested by Intel or known to work; other distributions may or may not work and are not recommended. If you have questions, access the Intel Community Forums when you need assistance. If you have Commercial Support, create a support ticket.
|
Release Version |
Hardware |
Linux |
Windows |
| 2026.2.0 | For CPU |
Support Added (+):
Support Removed (-):
|
Support Removed (-):
|
| For GPU |
Crescent Island (CRI):
PVC, ATS-M:
All other client GPU platforms:
|
ATS-M, All other client GPU platforms:
| |
|
2026.0.0 - 2026.1.1 |
For CPU |
|
|
| For GPU |
PVC, ATS-M:
All other client GPU platforms:
|
ATS-M, All other client GPU platforms:
|
Supported IDEs
| Release Version | Eclipse | Microsoft Visual Studio |
| 2026.2.0 |
|
|
| 2026.1.0 - 2026.1.1 |
|
|
| 2026.0.0 |
|
|
Software Requirements
- Linux kernel 4.11 or higher
- Supported minimum versions of distributed libraries that the compilers are built on: GCC - 7.5.0, BINUTILS- 2.30, GLIBC-2.28, G++ - 7.5.0.
- If the highest version of GNU gcc used doesn't have the equivalent g++ package installed, the customer will run into an error. For further details, please check this article--fatal error: <C++ header> file not found with Intel® oneAPI DPC++/C++ Compiler
For GPU: Level 0 and OpenCL graphics drivers
- To install the Linux General Purpose Intel GPUs (GPGPU) Driver, see the installation guide and follow the directions for your device.
| Release | Linux Driver | Windows Driver |
| 2026.1.0 - 2026.2.0 |
Intel® Data Center GPUs:
Intel® Client GPUs
|
|
| 2026.0.0 |
Intel® Data Center GPUs: Intel® Client GPUs: |
|
-
You must have the latest drivers to collect GPU usage events and processor graphics hardware events on Windows*. Request drivers from Intel® Support or download them here.
-
Requirements to compile DPC++ applications: You must compile DPC++ applications with -gline-tables-only and -fdebug-info-for-profiling options to ensure the availability of debug information for performance analysis.
Graphics Driver Installation
-
Windows Intel® Graphics Driver
To install the driver follow the directions in the article appropriate for your device- Intel® Arc™ Graphics, 11th-13th Gen Intel® Core™ processor directions.
- Xe Dedicated, 6th-10th Gen Intel® Core™ Processor Graphics, and related Intel Atom®, Pentium®, and Celeron® processors directions. Driver version varies depending on the Intel® Graphics in the system.
- Intel® Data Center GPU Flex Series (ATS-M). Contact your OEM representative for access to the Intel® Registration Center.
- Linux General Purpose Intel® GPUs (GPGPU) Driver
For all Intel® GPUs, see this article, Overview, and follow the directions for your device.
C/C++ Standard
- Intel® oneAPI DPC++/C++ Compiler version 2026.0.0 supports the C/C++ standards through the Clang 22 front end.
Support Deprecated
- The following OS support is deprecated and will be discontinued with a future release
- For CPU:
- Windows Pro & Enterprise 10
- Windows Server 2019
- For GPU
- All other client GPU platforms:
- Ubuntu 25.10
- All other client GPU platforms:
- For CPU:
Support Removed
- The following OS is not longer supported for 2026.0.0
- For CPU
- SLES 15 SP4, SP5
- Fedora 41
- Debian 11
- For GPU
- PVC:
- RHEL/Rocky 9.5
- ATS-M:
- RHEL/Rocky 9.5,
- Windows Server 2019
- All other client GPU platforms:
- Ubuntu LTS 25.04
- PVC:
- For CPU
- Support for Microsoft Visual Studio* 2019 has been discontinued starting from the 2026.0.0 release. Users are recommended to upgrade to a supported Visual Studio version (Microsoft Visual Studio* 2022 or later) to continue using the Compiler IDE extensions.
Additional Documentation
- Get Started with the Intel oneAPI Toolkit for Linux*®
- Get Started with the Intel oneAPI Toolkit for Windows*®
- OneAPI Versioning Schema
- Intel® oneAPI DPC++/C++ Compiler Developer Guide and Reference
- Intel® oneAPI Programming Guide
Notices and Disclaimers
Intel optimizations, for Intel compilers or other products, may not optimize to the same degree for non-Intel products.
Intel technologies may require enabled hardware, software, or service activation.
No product or component can be absolutely secure.
Your costs and results may vary.
© Intel Corporation. Intel, the Intel logo, and other Intel marks are trademarks of Intel Corporation or its subsidiaries. Other names and brands may be claimed as the property of others.
No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document.
The products described may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request.
Intel optimizations, for Intel compilers or other products, may not optimize to the same degree for non-Intel products.
Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from a course of performance, course of dealing, or usage in trade.