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  • Brand Name: Core Ultra

  • Product Number: 6526Y

  • Ordering Code: PK8072205559500

  • SPEC Code: SRN6N

  • Code Name: Emerald Rapids

Arria® V 5AGXA3 FPGA

Specifications

Export specifications

Essentials

I/O Specifications

Package Specifications

Supplemental Information

Ordering and Compliance

Ordering and spec information

Arria® V 5AGXA3 FPGA 5AGXMA3D4F31I3G

  • MM# 965645
  • Spec Code SR4QF
  • Ordering Code 5AGXMA3D4F31I3G
  • Stepping A1
  • MDDS Content IDs 692308,  745163

Arria® V 5AGXA3 FPGA 5AGXMA3D4F27C4G

  • MM# 965920
  • Spec Code SR4YG
  • Ordering Code 5AGXMA3D4F27C4G
  • Stepping A1
  • MDDS Content IDs 697083,  745811

Arria® V 5AGXA3 FPGA 5AGXMA3D4F31C4G

  • MM# 968853
  • Spec Code SR7EH
  • Ordering Code 5AGXMA3D4F31C4G
  • Stepping A1
  • MDDS Content IDs 694082,  745291

Arria® V 5AGXA3 FPGA 5AGXBA3D4F27I5G

  • MM# 978994
  • Spec Code SRCZB
  • Ordering Code 5AGXBA3D4F27I5G
  • Stepping A1
  • MDDS Content IDs 694984,  746255

Arria® V 5AGXA3 FPGA 5AGXBA3D4F27C4G

  • MM# 999G0C
  • Spec Code SRFKT
  • Ordering Code 5AGXBA3D4F27C4G
  • Stepping A1
  • MDDS Content IDs 702901

Arria® V 5AGXA3 FPGA 5AGXBA3D4F27C5G

  • MM# 999G0D
  • Spec Code SRFKU
  • Ordering Code 5AGXBA3D4F27C5G
  • Stepping A1
  • MDDS Content IDs 698947

Arria® V 5AGXA3 FPGA 5AGXBA3D4F31C4G

  • MM# 999G0F
  • Spec Code SRFKV
  • Ordering Code 5AGXBA3D4F31C4G
  • Stepping A1
  • MDDS Content IDs 696391,  746325

Arria® V 5AGXA3 FPGA 5AGXBA3D4F31C5G

  • MM# 999G0G
  • Spec Code SRFKW
  • Ordering Code 5AGXBA3D4F31C5G
  • Stepping A1
  • MDDS Content IDs 697946,  746582

Arria® V 5AGXA3 FPGA 5AGXBA3D4F31I5G

  • MM# 999G0H
  • Spec Code SRFKX
  • Ordering Code 5AGXBA3D4F31I5G
  • Stepping A1
  • MDDS Content IDs 701444

Arria® V 5AGXA3 FPGA 5AGXBA3D6F27C6G

  • MM# 999G0J
  • Spec Code SRFKY
  • Ordering Code 5AGXBA3D6F27C6G
  • Stepping A1
  • MDDS Content IDs 700272,  745290

Arria® V 5AGXA3 FPGA 5AGXBA3D6F31C6G

  • MM# 999G0K
  • Spec Code SRFKZ
  • Ordering Code 5AGXBA3D6F31C6G
  • Stepping A1
  • MDDS Content IDs 701561

Arria® V 5AGXA3 FPGA 5AGXMA3D4F27C5G

  • MM# 999G3G
  • Spec Code SRFN2
  • Ordering Code 5AGXMA3D4F27C5G
  • Stepping A1
  • MDDS Content IDs 697959

Arria® V 5AGXA3 FPGA 5AGXMA3D4F27I3G

  • MM# 999G3J
  • Spec Code SRFN3
  • Ordering Code 5AGXMA3D4F27I3G
  • Stepping A1
  • MDDS Content IDs 698179

Arria® V 5AGXA3 FPGA 5AGXMA3D4F27I5G

  • MM# 999G3K
  • Spec Code SRFN4
  • Ordering Code 5AGXMA3D4F27I5G
  • Stepping A1
  • MDDS Content IDs 701930

Arria® V 5AGXA3 FPGA 5AGXMA3D4F31C5G

  • MM# 999G3L
  • Spec Code SRFN5
  • Ordering Code 5AGXMA3D4F31C5G
  • Stepping A1
  • MDDS Content IDs 702095

Arria® V 5AGXA3 FPGA 5AGXMA3D4F31I5G

  • MM# 999G3M
  • Spec Code SRFN6
  • Ordering Code 5AGXMA3D4F31I5G
  • Stepping A1
  • MDDS Content IDs 698735,  745141

Arria® V 5AGXA3 FPGA 5AGXMA3D6F27C6G

  • MM# 999G3N
  • Spec Code SRFN7
  • Ordering Code 5AGXMA3D6F27C6G
  • Stepping A1
  • MDDS Content IDs 697697

Arria® V 5AGXA3 FPGA 5AGXMA3D6F31C6G

  • MM# 999G3P
  • Spec Code SRFN8
  • Ordering Code 5AGXMA3D6F31C6G
  • Stepping A1
  • MDDS Content IDs 692253

Trade compliance information

  • ECCN 3A991
  • CCATS NA
  • US HTS 8542390001

PCN Information

SRFKZ

SRFKY

SRFKX

SRFKW

SRFKV

SRFKU

SRFN8

SRFKT

SRFN7

SR7EH

SR4YG

SRFN6

SRFN5

SRFN4

SRCZB

SRFN3

SRFN2

SR4QF

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Launch Date

The date the product was first introduced.

Lithography

Lithography refers to the semiconductor technology used to manufacture an integrated circuit, and is reported in nanometer (nm), indicative of the size of features built on the semiconductor.

Logic Elements (LE)

Logic elements (LEs) are the smallest units of logic in Intel® FPGA architecture. LEs are compact and provide advanced features with efficient logic usage.

Adaptive Logic Modules (ALM)

The adaptive logic module (ALM) is the logic building block in supported Intel FPGA devices, and is designed to maximize both performance and utilization. Each ALM has several different modes of operation, and can implement a variety of different combinatorial and sequential logical functions.

Adaptive Logic Module (ALM) Registers

ALM registers are those register bits (flip-flops) that are contained inside the ALMs and are used to implement sequential logic.

Fabric and I/O Phase-Locked Loops (PLLs)

Fabric and IO PLLs are used to simplify the design and implementation of the clock networks in the Intel FPGA fabric, and also the clock networks associated with the IO cells in the device.

Maximum Embedded Memory

The total capacity of all the embedded memory blocks in the programmable fabric of the Intel FPGA device.

Digital Signal Processing (DSP) Blocks

The digital signal processing (DSP) block is the mathematical building block in supported Intel FPGA devices and contains high-performance multipliers and accumulators to implement a variety of digital signal processing functions.

Digital Signal Processing (DSP) Format

Depending on the Intel FPGA device family, the DSP block supports different formats such as hard floating point, hard fixed point, multiply and accumulate, and multiply only.

Hard Memory Controllers

Hard memory controllers are used to enable high-performance external memory systems attached to the Intel FPGA. A hard memory controller saves power and FPGA resources compared to the equivalent soft memory controller, and supports higher frequency operation.

External Memory Interfaces (EMIF)

The external memory interface protocols supported by the Intel FPGA device.

Maximum User I/O Count†

The maximum number of general purpose I/O pins in the Intel FPGA device, in the largest available package.
† Actual count could be lower depending on package.

I/O Standards Support

The general purpose I/O interface standards supported by the Intel FPGA device.

Maximum LVDS Pairs

The maximum number of LVDS pairs that can be configured in the Intel FPGA device, in the largest available package. Refer to device documentation for actual RX and TX LVDS pairs count by package type.

Maximum Non-Return to Zero (NRZ) Transceivers†

The maximum number of NRZ transceivers in the Intel FPGA device, in the largest available package.
† Actual count could be lower depending on package.

Maximum Non-Return to Zero (NRZ) Data Rate†

The maximum NRZ data rate that is supported by the NRZ transceivers.
† Actual data rate could be lower depending on transceiver speed grade.

Transceiver Protocol Hard IP

Hard intellectual property available in the Intel FPGA device to support the high-speed serial transceivers. Transceiver protocol hard IP saves power and FPGA resources compared to the equivalent soft IP, and simplifies the implementation of the serial protocol.

FPGA Bitstream Security

Depending on the Intel FPGA device family, various security features are available to prevent copying of the customer bitstream, and detect attempts to tamper with the device during operation.

Analog-to-Digital Converter

The analog-to-digital converter is a data-converter resource available in some Intel FPGA device families.

Package Options

Intel FPGA devices are available in different package sizes, with different IO and transceiver counts, to match customer system requirements.

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All information provided is subject to change at any time, without notice. Intel may make changes to manufacturing life cycle, specifications, and product descriptions at any time, without notice. The information herein is provided "as-is" and Intel does not make any representations or warranties whatsoever regarding accuracy of the information, nor on the product features, availability, functionality, or compatibility of the products listed. Please contact system vendor for more information on specific products or systems.

Intel classifications are for general, educational and planning purposes only and consist of Export Control Classification Numbers (ECCN) and Harmonized Tariff Schedule (HTS) numbers. Any use made of Intel classifications are without recourse to Intel and shall not be construed as a representation or warranty regarding the proper ECCN or HTS. Your company as an importer and/or exporter is responsible for determining the correct classification of your transaction.

Refer to Datasheet for formal definitions of product properties and features.

‡ This feature may not be available on all computing systems. Please check with the system vendor to determine if your system delivers this feature, or reference the system specifications (motherboard, processor, chipset, power supply, HDD, graphics controller, memory, BIOS, drivers, virtual machine monitor-VMM, platform software, and/or operating system) for feature compatibility. Functionality, performance, and other benefits of this feature may vary depending on system configuration.

“Announced” SKUs are not yet available. Please refer to the Launch Date for market availability.