Revolutionize Digital Signal Processing for Flexibility, Adaptability, and Performance
Achieve high performance while maintaining the flexibility to meet today's DSP needs and seamlessly adapt to future AI challenges using Enhanced DSP block with AI Tensor.
Flexibility, Adaptability, and Performance
Developers face the challenge of choosing solutions to satisfy both current and future performance and power needs, all while competing in today’s AI revolution. Enhanced DSP block with AI Tensor uses variable precision support to deliver the flexibility needed to easily switch between different data types. Its precision allows developers to adapt the FPGA to diverse application requirements without the need for significant hardware modifications. The AI Tensors included in each DSP block provide the processing power to embrace AI workloads in high-performance low-power FPGA devices.
Learn How Intel FPGAs with DSP Block Create Solutions
AI
The revolutionary addition of AI Tensors to the traditional FPGA DSP block enables support for AI applications with high-performance vector and matrix operations in a scalable, resource and power efficient FPGA device.
Industrial
Industrial DSP applications, such as robotics, machine vision, smart energy solutions, and Industry 4.0 initiatives require customizable and flexible systems. These applications are well supported by the single-precision, half-precision, and 16-bit complex arithmetic in every DSP with AI Tensor.
Wireless Communication
The flexibility provided by variable precision support built-in to every DSP block with AI Tensor makes this technology an ideal fit to support today's wide range of wireless communications solutions each with different frequency bands, bandwidths, standards, and design considerations.
Military
Military applications benefit greatly from the mixed-precision fixed and floating-point support provided by the variable precision DSP with AI Tensor, providing developers with precision for performance while controlling resources and reducing power consumption.
Getting Started
Intel® FPGAs
Learn more about the different Intel FPGAs with variable-precision DSP blocks.
Step 1
Download the latest Intel® Quartus® Prime Design Software. An optional DSP Builder add-on is available with the design software download.
Step 2
Browse the different Intel FPGA IPs for video and vision processing, error detection and correction, filters, floating point, modulation and demodulation, and transforms.
Step 3 (Optional)
Add the DSP Builder for Intel® FPGAs, get licensing support information, and obtain a 30-day trial software from MathWorks.
FAQs
Frequently Asked Questions
A variable precision DSP block is a power and area-efficient hardened IP block that balances compute resources with precision. Each DSP block can be independently configured or cascaded to scale for high-throughput processing.
For example, it can support a single-precision floating-point arithmetic or twice the number of half-precision operations on the same hardware. In total, it supports 6xINT9 or 2xINT16 or 1xCINT16 or 2xINT18x19 or1xINT24 or 1xINT27 or2xBfloat16 or2xFP16 or 2xTFP32 or 1xFP32 operation all with the same hardware.
A tensor is a mathematical object used to represent multi-dimensional arrays of data. Tensors generalize scalars (0-dimensional), vectors (1-dimensional), and matrices (2-dimensional) to higher-dimensional arrays. In Intel® FPGAs, three tensors are provided in every single DSP block and each supports up to 40 INT8 operations per clock.
The Intel® DSP with AI Tensor includes the tensors inside the DSP block. Co-locating the tensor arrays inside the DSP block beside the logic fabric reduces the need for data transfers, bottlenecks, and reduces the challenges of the place and route process.