Intel Press Release

Intel Chairman Andrew S. Grove Shows Intel's Fastest Microprocessor In Opening Address At Developer Forum

INTEL DEVELOPER FORUM, PALM SPRINGS, Calif., Feb. 15, 2000 - Intel Corporation Chairman Andrew S. Grove today kicked off the semi-annual Intel Developer Forum by demonstrating the company's fastest microprocessor: a chip running at 1.5 gigahertz (GHz), or 1.5 billion clock cycles per second, at room temperature. Based on a new microarchitecture from Intel, the chip is code-named "Willamette."

With Senior Vice President Albert Yu, general manager of Intel's Microprocessor Products Group, Dr. Grove also demonstrated the first production-level Pentium® III processor-based systems that run at 1 GHz, to be introduced in limited quantities shortly.

The demonstrations capped Dr. Grove's keynote speech in which he told the audience of 2,000 developers that the demands placed by the Internet on information technology are growing by "powers of ten." To succeed in the Internet economy, he said, companies must build infrastructures that can grow rapidly and affordably with e-Business demands. This requires not only the dramatic performance represented by such powerful new microprocessors but also the ability to grow by "scaling out" infrastructure through the volume economics of the Intel Architecture.

"Growth by powers of ten demands the best performance and volume economics," said Dr. Grove. "We have done this before with PCs. Now we are doing it for the Internet."

Grove: Information, Transactions, and Markets
Internet applications of today, which are delivering information, executing transactions, and creating new markets, are placing new and growing demands on information technology, said Dr. Grove. Over the next few years, business-to-consumer and business-to-business transactions will be augmented by the ability to create comprehensive, end-to-end chains of suppliers, companies, and customers. In this environment, standards-based technology solutions and volume economics will be imperatives for success.

Dr. Grove was joined on stage by executives of Google Inc., EToys, and Commerce One,* who discussed innovative uses of Intel Architecture systems in their fast-growing infrastructures. These included redundant arrays of economical servers as well as clustered architectures that provide e-Businesses the ability to scale-out flexible server farms that grow as Internet demands grow.

First Details of Next-Generation Microarchitecture
Following Dr. Grove's keynote speech, Dr. Yu disclosed features of several new products and technologies due from Intel beginning later this year. These included a next-generation 32-bit microarchitecture that is the basis for "Willamette," a high-performance desktop processor to be introduced in the second half of this year at speeds well over 1 GHz. Intel has started its sampling process of "Willamette" to computer manufacturers.

Dr. Yu also discussed key features of this new microarchitecture for the first time:

  • A new, hyper pipelined design. The deeper pipeline enables instructions inside the processor to be queued and executed at a much faster rate, allowing processors to achieve the world's highest clock speeds for desktop PCs.
  • Streaming SIMD Extensions 2. A set of 144 new instructions that are compatible with the broad base of software using the Streaming SIMD Extensions of the Pentium III processor, these new extensions enhance performance to accelerate video, encryption, and support the next generation of Internet computing applications.
  • The computing industry's first 400 MHz system bus. The bus, which transfers information from the processor to the rest of the system, runs three times faster than the 133 MHz system bus used with today's Pentium III processor.

Intel's first "Smart Integration" architecture
Dr. Yu also discussed "Timna," Intel's first "smart integration" microprocessor and a leadership product for the value PC market segment. Designed to set a new standard of platform price-performance in the value segment, "Timna" is based on Intel's current P6 microarchitecture. It incorporates a central processing unit core, memory controller, and graphics into one chip to deliver the performance, features, and cost benefits needed for value PCs. "Timna" will complement the current Intel Celeron® processor line when it is introduced in the second half of 2000.

About IDF
The Intel Developer Forum is Intel's premier technical forum comprising nearly 150 sessions and hands-on labs and more than 100 demonstrations of cutting-edge products and technologies. IDF attracts over 2,000 hardware and software developers from around the world, of whom nearly 30 percent are focused on software. Now in its third year, the semi-annual conference provides hardware OEMs (original equipment manufacturers), IHVs (independent hardware vendors), and ISVs (independent software vendors) with in-depth information on Intel technologies and initiatives. More information on the Intel Developer Forum can be found at http://developer.intel.com/idf. Updated information is available between Intel Developer Forums by subscribing to the Intel Developer Update Magazine at http://developer.intel.com/update/.

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