Article ID: 000099410 Content Type: Troubleshooting Last Reviewed: 08/01/2024

Why does the F-Tile Low Latency Ethernet 10G MAC FPGA IP show the target development kit as a P-Tile and E-Tile board?

Environment

  • Intel® Quartus® Prime Pro Edition
  • Low Latency Ethernet 10G MAC Intel® FPGA IP
    • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Due to a problem in the Quartus® Prime Pro Edition Design Software Version 24.2, the F-Tile Low Latency Ethernet 10G MAC FPGA IP GUI Example Design tab shows the target board as Agilex™ 7 FPGA F-Series Development Kit (Production P-Tile and E-Tile) when the target is an F-Tile based device.

    Resolution

    This problem will be resolved in future versions of the Quartus® Prime Pro Edition Design Software.

    Related Products

    This article applies to 2 products

    Intel Agilex® 7 FPGAs and SoC FPGAs F-Series
    Intel Agilex® 7 FPGAs and SoC FPGAs I-Series

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