Article ID: 000099248 Content Type: Troubleshooting Last Reviewed: 07/16/2024

How do I reduce the simulation time required to simulate F-Tile Transceiver-based designs that use FEC?

Environment

  • Intel® Quartus® Prime Pro Edition
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    Description

    Due to a problem in the Prime Pro Edition Software version 24.2, the C-models required for faster simulation times of F-Tile transceiver-based designs that use FEC are not enabled by default.

     

    Resolution

    To work around this problem, perform the following steps, depending on which simulator you are using:

    • VCS
    1. Open simulation setup script (vcs_setup.sh) in the Synopsys VCS simulation directory
    2. Append the following option into USER_DEFINED_SIM_OPTIONS

    USER_DEFINED_SIM_OPTIONS ="-sv_lib $QUARTUS_INSTALL_DIR/eda/sim_lib/libdb_gdr_fec"

    1. Append the following option into USER_DEFINED_ELAB_OPTIONS

    USER_DEFINED_ELAB_OPTIONS=”+define+gdrb_GDR_FEC_FASTSIM”

     

    • Xcelium
    1. Open simulation setup script (xcelium_setup.sh) in the Xcelium simulation directory.
    2. Append the following option into USER_DEFINED_SIM_OPTIONS

    USER_DEFINED_SIM_OPTIONS ="-sv_lib $QUARTUS_INSTALL_DIR/eda/sim_lib/libdb_gdr_fec"

    1. Append the following option into USER_DEFINED_COMPILE_OPTIONS

    USER_DEFINED_COMPILE_OPTIONS=”+define+gdrb_GDR_FEC_FASTSIM”

     

    • Questasim
    1. Open simulation setup script (msim_setup.tcl) in the Mentor simulation directory.
    2. Append the following option into USER_DEFINED_ELAB_OPTIONS

    USER_DEFINED_ELAB_OPTIONS ="-sv_lib $QUARTUS_INSTALL_DIR/eda/sim_lib/libdb_gdr_fec"

    1. Append the following option into USER_DEFINED_COMPILE_OPTIONS

    USER_DEFINED_COMPILE_OPTIONS=”+define+gdrb_GDR_FEC_FASTSIM”

     

    • Riviera

                    Riviera simulator is currently not supported.  

     

    This problem is scheduled to be fixed in a future version of the Quartus® Prime Pro Edition Software.

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