Article ID: 000099109 Content Type: Troubleshooting Last Reviewed: 06/18/2024

​​​​​​​Why does the MIPI CSI-2 FPGA IP Design Example fail generation when using the Quartus® Prime Pro Edition Software 24.1 Windows* version?

Environment

  • Intel® Quartus® Prime Pro Edition
  • Interfaces
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Due to a problem with the MIPI CSI-2 FPGA IP, the error shown below will be seen when generating the MIPI CSI-2 FPGA IP Example Design with simulation enabled. This problem only affects the Windows* version of the Quartus® Prime Pro Edition Software.

    Error: error copying "<quartus_installed_directory>/24.1/quartus/../ip/altera/mipi_protocol/hw_demo/agilex_5/simulation/vcs_sim.sh" to "C:/Users/works/AppData/Local/Temp/alt9831_16071455020750053447.dir/0001_intel_mipi_csi2_0_gen/ed_sim/sim/synopsys/vcs/sim.sh": no such file or directory


     

    Resolution

    To work around this problem, modify the <quartus_installed_directory>\24.1\ip\altera\mipi_protocol\csi2\tcl\mipi_csi2_qsys_ed.tcl file as shown below:

    From:
    file copy $ed_src_dir/simulation/vcs_sim.sh ed_sim/sim/synopsys/vcs/sim.sh
    file copy $ed_src_dir/simulation/vcsmx_sim.sh ed_sim/sim/synopsys/vcsmx/sim.sh

    To:
    # Remove these files for Windows
    #file copy $ed_src_dir/simulation/vcs_sim.sh ed_sim/sim/synopsys/vcs/sim.sh
    #file copy $ed_src_dir/simulation/vcsmx_sim.sh ed_sim/sim/synopsys/vcsmx/sim.sh
     
    #Note: Permission is required to make the file writable before you change it.

    This problem is scheduled to be fixed in a future version of the Quartus® Prime Pro Edition Software.