CALIBRATION WARNING: DQ* write margin width is larger than 1/2 of mem_clk period, results may be invalid

Due to a problem in Quartus® Prime Pro Edition Software version 24.1, you may see warning messages in the  Agilex™ 5 EMIF Calibration Debug Toolkit.

This problem occurred when you enabled the auto-computed memory clock frequency in the External Memory Interfaces (EMIF) IP.

The  Agilex™ 5 EMIF Calibration Debug Toolkit has picked up a wrong value for memory clock frequency, thus causing the warning messages.

The warning messages are shown below:

• CALIBRATION WARNING: DQ[0] read margin width is larger than 1/2 of mem_clk period, results may be invalid
• CALIBRATION WARNING: DQ[0] write margin width is larger than 1/2 of mem_clk period, results may be invalid
• CALIBRATION WARNING: DQ[1] read margin width is larger than 1/2 of mem_clk period, results may be invalid
• CALIBRATION WARNING: DQ[1] write margin width is larger than 1/2 of mem_clk period, results may be invalid
• CALIBRATION WARNING: DQ[2] read margin width is larger than 1/2 of mem_clk period, results may be invalid
• CALIBRATION WARNING: DQ[2] write margin width is larger than 1/2 of mem_clk period, results may be invalid
• CALIBRATION WARNING: DQ[3] read margin width is larger than 1/2 of mem_clk period, results may be invalid
• CALIBRATION WARNING: DQ[3] write margin width is larger than 1/2 of mem_clk period, results may be invalid
• CALIBRATION WARNING: DQ[4] read margin width is larger than 1/2 of mem_clk period, results may be invalid
• CALIBRATION WARNING: DQ[4] write margin width is larger than 1/2 of mem_clk period, results may be invalid
• CALIBRATION WARNING: DQ[5] read margin width is larger than 1/2 of mem_clk period, results may be invalid
• CALIBRATION WARNING: DQ[5] write margin width is larger than 1/2 of mem_clk period, results may be invalid
• CALIBRATION WARNING: DQ[*] read margin width is larger than 1/2 of mem_clk period, results may be invalid
• CALIBRATION WARNING: DQ[*] write margin width is larger than 1/2 of mem_clk period, results may be invalid

To workaround this problem, please follow the steps below:

1. Untick the auto-computed Memory Clock Frequency check box in the External Memory Interfaces (EMIF) IP GUI.
2. Manually key in the value for memory clock frequency.
3. Regenerate the IP.
4. Recompile the design.
5. Retest with Agilex™ EMIF Calibration Debug Toolkit.

This problem is scheduled to be fixed in future release of Quartus® Prime Pro Edition Software.