Article ID: 000098922 Content Type: Error Messages Last Reviewed: 05/27/2024

Why do I get the critical warning when I assigned GPIOs on I/O Bank 2 on MAX® 10 with the analog-to-digital converter (ADC) project?

Environment

  • Intel® Quartus® Prime Lite Edition
  • Modular ADC core Intel® FPGA IP
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    You will get the critical warning message "Critical Warning(16248) Pin XYZ is placed too close with ADC pins" when you assign GPIO pins to I/O Bank 1A, 1B, 2, and 8 with an analog-to-digital converter (ADC) block being used in MAX® 10 E144 package device.

    Resolution

    Please refer to Table 19 from the MAX® 10 General Purpose I/O User Guide:

    Please refer above table to assign the GPIO pins to the correct I/O banks. 

     

    Related Products

    This article applies to 1 products

    Intel® MAX® 10 FPGAs