Article ID: 000098873 Content Type: Errata Last Reviewed: 05/27/2024

Why is the eCPRI FPGA IP unable to run on hardware using Stratix® 10 E-Tile with the Nios® V Processor for FPGA and turn on the interworking function (IWF)?

Environment

  • Intel® Quartus® Prime Pro Edition
    • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Due to a problem in the eCPRI FPGA IP version 3.0.2 in the example design, you may find that there is an error shown at the 10G transaction after changing the dynamic reconfiguration process from 25G to 10G.

     

    Resolution

    This problem is scheduled to be fixed in a future release of the Quartus® Prime Pro Edition Software.

    Related Products

    This article applies to 3 products

    Intel® Stratix® 10 DX FPGA
    Intel® Stratix® 10 MX FPGA
    Intel® Stratix® 10 TX FPGA

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