Due to a problem in the Quartus® Prime Pro Edition Software version 24.1, you might see HSSI parameter settings for TX Equalizer in the Agilex™ 5 FPGA GTS transceiver are not configured correctly when you try to set the TX Equalizer parameters setting in the Quartus Prime settings file (.qsf) or by using the Assignment Editor tool.
The affected HSSI parameter settings for the TX Equalizer in the Agilex™ 5 FPGA GTS transceiver that are set using the method mentioned above include the main_tap, pre_tap_1, pre_tap_2, and post_tap values.
To work around this problem, perform a direct register write to update the GTS TX Equalizer register value during user mode. The offset register address information for the TX Equalizer settings can be found in the Agilex™ 5 FPGA GTS Transceiver PHY User Guide, under the register map section GTS PMA/FEC Direct PHY IP Register Map.
This problem is fixed beginning with the Quartus® Prime Pro Edition software version 24.3.