Article ID: 000098654 Content Type: Troubleshooting Last Reviewed: 05/09/2025

Why do QSPI commands in Mailbox Client FPGA IP with input flash address beyond the flash boundary return an incorrect response code when using the Agilex™ 7 FPGA devices?

Environment

    Intel® Quartus® Prime Pro Edition
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Description

Due to a problem in the Quartus® Prime Pro Edition Software version 24.1, the QSPI commands in Mailbox Client FPGA IP with input flash address beyond the flash boundary return an incorrect response code when using the Agilex™ 7 FPGA devices. This problem has no impact on device functionality.

 

QSPI command

Correct response code in 23.4 or earlier

Incorrect response code in 24.1

QSPI_READ

0x9 (ALT_SDM_MBOX_RESP_INVALID_ADDR)

0x4 (ALT_SDM_MBOX_RESP_INVALID_COMMAND_PARAMS)

QSPI_WRITE

0x9 (ALT_SDM_MBOX_RESP_INVALID_ADDR)

0x4 (ALT_SDM_MBOX_RESP_INVALID_COMMAND_PARAMS)

QSPI_ERASE

0x9 (ALT_SDM_MBOX_RESP_INVALID_ADDR)

0x4 (ALT_SDM_MBOX_RESP_INVALID_COMMAND_PARAMS)

QSPI_READ_SHA

0x9 (ALT_SDM_MBOX_RESP_INVALID_ADDR)

0x80 (ALT_SDM_MBOX_RESP_QSPI_HW_ERROR)

 

Resolution

To work around this problem, execute QSPI commands with a valid flash address within the flash boundary. No power cycle is needed. To obtain the flash density value, use the mailbox command QSPI_GET_DEVICE_INFO. Note that the returned flash density value is specified in bits while the flash address for QSPI commands is specified in bytes.

 

This problem has been fixed in Quartus® Prime Pro Edition Software version 24.2.

Related Products

This article applies to 1 products

Intel Agilex® 7 FPGAs and SoC FPGAs

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