Article ID: 000098648 Content Type: Troubleshooting Last Reviewed: 05/22/2025

Why does tx_ready fail to assert on my F-Tile PMA/FEC Direct PHY FPGA IP bonded variant with the Datapath clocking mode parameter set to “PMA”, the PMA width parameter set to “32”, and the Enable TX double width transfer parameter unselected?

Environment

    Intel® Quartus® Prime Pro Edition
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Description

Due to a problem in the Quartus® Prime Pro Edition Software version 23.4, tx_ready will fail to assert on the F-Tile PMA/FEC Direct PHY FPGA IP bonded variant with the Datapath clocking mode parameter set to “PMA”, the PMA width parameter set to “32” and the Enable TX double width transfer parameter unselected.

Resolution

There is no workaround for this problem.

This problem has been fixed starting in version 24.3 of the Quartus® Prime Pro Edition Software.

Related Products

This article applies to 1 products

Intel Agilex® 7 FPGAs and SoC FPGAs

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