Article ID: 000098584 Content Type: Troubleshooting Last Reviewed: 04/08/2024

Why are registers with synchronous clear not assigned to fast input registers in Arria® 10 device?

Environment

  • Intel® Quartus® Prime Design Software
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Due to a specification of the synthesis in the Quartus® Prime software, even if the Fast Input Register assignment is used, registers with synchronous clear may not be assigned to fast input registers in Arria® 10 device.

    Whether or not  registers with synchronous clear are assigned to fast input registers is determined as follows:

    • When the number of registers with synchronous clear is less than 8, the registers are assigned to ALM registers in the core fabric.
    • When the number of registers with synchronous clear is 8 or more, the registers are assigned to fast input registers. 
    Resolution

    Add the following assignment to the .qsf file of your project when you want to assign registers with synchronous clear to fast input registers in the case where the number of them is less than 8.

    set_instance_assignment -name FORCE_SYNCH_CLEAR ON -to <register name> -entity <entity name>
     

    Related Products

    This article applies to 1 products

    Intel® Arria® 10 FPGAs and SoC FPGAs