Why can’t I find intel_pcie_bam_interpreter IP in the IP Catalog in Platform Designer?

This behavior might be seen in the Quartus® Prime Pro Edition Software version 23.3 and onward when users try to instantiate intel_pcie_bam_interpreter IP , which is used in the Multi-Channel DMA Intel® FPGA IP for PCI Express* Design Example.

To work around this problem in the Quartus® Prime Pro Edition Software version 23.3 and onward, follow the steps below:

1. Generate and compile the F-Tile Multi-Channel DMA Intel® FPGA for PCI Express Example Design.
2. Navigate to the directory <…/intel_pcie_ftile_mcdma_0_example_design/ip/pcie_ed>.
3. Copy the pcie_ed_PIO_INTERPRETER_M0.ip into the current project ip directory.
4. Instantiate the IP as a Generic Component using the IP implementation type from the pcie_ed_PIO_INTERPRETER_M0.ip file.