Article ID: 000098475 Content Type: Error Messages Last Reviewed: 03/29/2024

Why do I see an error when placing the upstream IOPLL two banks away from the downstream IOPLL when using IOPLL cascading with Agilex™ 7 F-series and I-series?

Environment

    IOPLL Intel® FPGA IP
BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

When placing an upstream IOPLL two IO sub-banks away from the downstream IOPLL when using IOPLL cascading with Agilex™ 7 F-series and I-series, the Quartus® Prime Pro Edition Software will issue the following error:

Error(14566): The Fitter cannot place 1 periphery component(s) due to conflicts with existing constraints (1 IOPLL(s)).

Fix the errors described in the sub-messages, and then rerun the Fitter.

The FPGA Knowledge Database may also contain articles on resolving this periphery placement failure. Review the errors and then visit the Knowledge Database at https://www.intel.com/content/www/us/en/support/programmable/kdb-filter.html and search for this specific error message number.

 

 

Resolution

Rely on Quartus® Prime Pro Edition Software to validate any implemented scheme.

Related Products

This article applies to 2 products

Intel Agilex® 7 FPGAs and SoC FPGAs F-Series
Intel Agilex® 7 FPGAs and SoC FPGAs I-Series

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