Description
In the F-Tile Ethernet Multirate FPGA IP simulation, during the initial link up with the Base profile and a startup profile set at 200GE variants, the test becomes unresponsive, leading to a hang in the Quartus® Prime Pro Edition Software version 24.1.
Despite the TX lane being stable and the VIP behavior appearing normal, the rx_pcs_ready signal is not getting asserted.
Resolution
This problem is scheduled to be fixed in a future release of the Quartus® Prime Pro Edition Software.