Why is the F-Tile Ethernet FPGA Hard IP with flow control enabled getting blocked from sending traffic when it receives PFC frames from a link partner?

Due to a problem in the Quartus® Prime Pro Edition Software version 23.4 and earlier, the F-Tile Ethernet FPGA Hard IP with flow control enabled is blocked from sending traffic when it receives PFC (Priority-based Flow Control) frames from the link partner. 

Traffic is usually blocked when the parameter Stop TX traffic when the link partner sends pause in the IP GUI is set to Yes. Here, you can see o_tx_ready going low, leading to traffic blocking. 

This problem is fixed beginning with the Quartus Prime Pro Edition software version 24.1.