Article ID: 000097792 Content Type: Product Information & Documentation Last Reviewed: 12/27/2023

Why do reads from the reconfig_pdp interface of my F-Tile PMA/FEC Direct PHY Intel® FPGA IP or F-Tile PMA/FEC Direct PHY Multirate Intel® FPGA IP return 0x00000000?

Environment

  • Intel® Quartus® Prime Pro Edition
    • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 23.2 and earlier, reading from the datapath Avalon® memory-mapped Interface (reconfig_pdp) may return 0x00000000 when the "readdatavalid" port is enabled on the datapath Avalon memory-mapped interface of your F-Tile PMA/FEC Direct PHY Intel FPGA IP or F-Tile PMA/FEC Direct PHY Multirate Intel FPGA IP design.

     

    Resolution

    This problem is fixed beginning with the Intel® Quartus® Prime Pro Edition Software version 23.3.

    Related Products

    This article applies to 1 products

    Intel Agilex® 7 FPGAs and SoC FPGAs

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