Article ID: 000097776 Content Type: Troubleshooting Last Reviewed: 12/27/2023

Why does the 'Cannot Set Parameter vsr_mode' error occur when upgrading the F-Tile PMA/FEC Direct PHY Intel® FPGA IP example design in the Intel® Quartus® Prime Pro Edition Software version 23.2 and onwards?

Environment

    Intel® Quartus® Prime Pro Edition
BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

In the Intel® Quartus® Prime Pro Edition Software version 23.2 and onwards, changes to VSR modes assignments have been introduced:

  • VSR_MODE_LOW_LOSS (replacing ENABLE in the Intel Quartus Prime Pro Edition Software version 23.1)
  • VSR_MODE_HIGH_LOSS (new configuration)
  • VSR_MODE_DISABLE (replacing DISABLE in the Intel Quartus Prime Pro Edition Software version 23.1)
Resolution

To work around this problem, the QSF assignment in the QSF file within the project needs to be updated to the appropriate required settings.

Related Products

This article applies to 1 products

Intel Agilex® 7 FPGAs and SoC FPGAs

1

Need more help?

Contact support

Disclaimer

1

All postings and use of the content on this site are subject to Intel.com Terms of Use.