Article ID: 000097667 Content Type: Troubleshooting Last Reviewed: 06/25/2025

Why do I sometimes see FPGA configuration from HPS fail in U-Boot/Linux on Agilex™ 7 FPGA devices?

Environment

    Intel® Quartus® Prime Pro Edition
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Critical Issue

Description

Due to a known problem in Quartus® Prime Pro Edition Software, the HPS IO hash of the Phase 1 bitstream may change if the IO assignments on HPS IO banks or HPS EMIF IO banks are updated. This may cause the Phase 2 bitstream used to load from U-Boot/Linux to be incompatible with the Phase 1 bitstream, resulting in errors during FPGA configuration from HPS. 
 

Resolution

Altera recommends locking down the HPS IOs and HPS EMIF IOs to avoid unwanted Phase 1 and Phase 2 bitstream incompatibilities. This is scheduled to be fixed in a future release of Quartus® Prime Pro Edition Software.

Related Products

This article applies to 1 products

Intel Agilex® 7 FPGAs and SoC FPGAs

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