Article ID: 000097468 Content Type: Troubleshooting Last Reviewed: 12/05/2023

Why is the Platform Designer interconnect back pressuring my AXI interface?

Environment

  • Intel® Quartus® Prime Pro Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    All components that implement AXI interfaces have issuance or acceptance capacity settings.  Any time the interconnect detects a manager (master) issuing more transactions than the issuance capacity setting of the manager, then the interconnect will backpressure the manager by deasserting AxREADY.  Any time the interconnect detects a subordinate (slave) receiving more transactions than the acceptance setting of the subordinate, then the interconnect will backpressure by deasserting AxVALID.

    Resolution

    When creating a new component, ensure the issuance or acceptance has been set correctly in the component .tcl file for each AXI interface.  Issuance and acceptance are typically defined based on the characteristics of the IP. For example, if the IP can only support three reads and four writes simultaneously, you would set the issuance or acceptance to 3/4/7 (read/write/total).  Issuance and acceptance are defined in terms of transactions (bursts) and not individual beats of a transaction.

    You can adjust the issuance and acceptance settings in the component .tcl file for existing components.  Manager interfaces have the following interface properties: “readIssuingCapability,” “writeIssuingCapability,” and “combinedIssuingCapability,” which define the read/write/total issuance capacity in the component .tcl file.  Subordinate interfaces have the following interface properties: “readAcceptanceCapability,” “writeAcceptanceCapability,” and “combinedAcceptanceCapability,” which define the read/write/total acceptance capacity in the component .tcl file.

    If you wish to modify these settings in components without editing the component .tcl file, you can manually adjust the issuance or acceptance of an interface by performing the following steps in Platform Designer:

    1. Select your instantiated component
    2. Select the “Component Instantiation” view tab
    3. Select the interface that you want to adjust the issuance/acceptance capacity
    4. Enter a new read, write, and total issuance or acceptance capacity

    Related Products

    This article applies to 1 products

    Intel® Programmable Devices