Article ID: 000097063 Content Type: Error Messages Last Reviewed: 01/29/2024

Error (16058): PLLs that use the x1 clock network and drive the same HSSI channel must be placed in the same transceiver bank

Environment

    Intel® Quartus® Prime Standard Edition
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Description

Due to a problem with Intel® Quartus® Prime Standard Edition Software version 18.1 or later, you might see this error when using Arria® V devices, even though your TX PLL is located in the same transceiver bank as the transceiver channels.

 

Resolution

To workaround this problem you can use Intel® Quartus® Prime Standard Edition Software version 18.0 or earlier. 

 

This problem is fixed in the Intel® Quartus® Prime Standard Edition Software versions 23.1.

Related Products

This article applies to 1 products

Arria® V FPGAs and SoC FPGAs

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