Article ID: 000096974 Content Type: Errata Last Reviewed: 04/18/2024

Why do the MAC counters of F-Tile Ethernet FPGA Hard IP get stuck at zero when dynamically reconfigured during hardware testing?

Environment

  • Intel® Quartus® Prime Pro Edition
    • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Due to a problem in the Quartus® Prime Pro Edition Software version 23.3, the MAC status of F-tile Ethernet FPGA Hard IP is not applicable to the SRC register initial power-on sequence. Hence, the MAC counters get stuck in zero while performing dynamic reconfiguration in the hardware test.

     

    Resolution

    There is no workaround.

    This problem is scheduled to be fixed in a future release of the Quartus® Prime Pro Edition Software.

    Related Products

    This article applies to 1 products

    Intel Agilex® 7 FPGAs and SoC FPGAs

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