Why does the host receive unexpected data packets from other channels when using the Multi-Channel DMA FPGA IP for PCI Express?

Due to a problem in the Quartus® Prime Pro Edition Software version 22.4, the host may receive D2H packets from unexpected channels when using the Multi-Channel DMA FPGA IP for PCI Express.

This problem occurs when the number of PFs (Physical Functions) has been changed to a smaller value than a previous setting. The parameters 'pf<i>_num_dma_chan_pf_hwtcl' and 'pf<i>_num_dma_chan_per_vf_hwtcl' are not cleared automatically for the unallocated PFs in the IP GUI.

To work around this problem, ensure to set the 'Number of DMA channels allocated to PF<i>' and 'Number of DMA channels allocated to each VF in PF<i>' manually to 0 for unallocated PFs before changing the 'Total physical functions numbers' to a smaller value in the GUI.