Description
Due to a problem in the Quartus® Prime Pro Edition Software version 23.3 and earlier, the o_rx_pcs_ready signal will fail to assert in hardware for the PAM4 variant of the F-Tile Ethernet FPGA Hard IP when the variant is using both a 312.5MHz PMA reference clock and the Quartus Setting File(QSF) assignment VSR_MODE_LOW_LOSS is being used.
Resolution
To work around this problem, disable the QSF assignment VSR_MODE_LOW_LOSS.
This problem is scheduled to be fixed in a future release of the Quartus® Prime Pro Edition Software.