Article ID: 000096579 Content Type: Product Information & Documentation Last Reviewed: 09/13/2023

Why does my Intel® MAX®10 device not load the image from CFM0 at power-up when CONFIG_SEL is pulled low via the recommended 10-K Ohms?

Environment

BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

As the CONFIG_SEL pin in Intel® MAX® 10 devices is a dual-purpose pin, it is equipped with an internal weak pull-up that is enabled by default before user mode.

Based on the values of the internal weak pull-up resistor in Table 17 in the Intel® MAX® 10 FPGA Device Datasheet, under some conditions, a 10-K Ohm external pull-down may not be strong enough to result in a logic low, resulting in the image not loading from CFM0 when the CONFIG_SEL function is enabled.

Resolution

If you are affected by this issue, you can equip a stronger external pull-down resistor (e.g. 1-K Ohms) on CONFIG_SEL.

Alternatively, you can disable the option “Set I/O to weak pull-up prior user-mode” in the .icb settings.

Note that this will disable the weak-pull up during configuration for all general-purpose I/O pins too.

Related Products

This article applies to 1 products

Intel® MAX® 10 FPGAs