Due to a problem in the Quartus® Prime Pro Edition Software version 23.2 and earlier, you may see an unconstrained clock reported in both the "Unconstrained Paths" report and the "Check Timing" report when selecting "Emulate TDP dual clock mode" for the RAM: 2-Port IP.
Below is the unconstrained clock reported:
*|ram_2port_0|fifo_wrapper_out|dcfifo_out|dcfifo_component|auto_generated|rdptr_g[0]
To work around this problem, add this constraint using clock_a as the source clock:
create_generated_clock -name rdptr -source <clock_a_node> -divide_by 1 [get_keepers {*|ram_2port_0|fifo_wrapper_out|dcfifo_out|dcfifo_component|auto_generated|rdptr_g[0]}]
This problem is scheduled to be fixed in a future release of the Quartus® Prime Pro Edition Software.