Article ID: 000095756 Content Type: Troubleshooting Last Reviewed: 06/18/2024

Why is the timestamp accuracy error of the 1G/2.5G/5G/10G Multi-rate Ethernet PHY Stratix® 10 FPGA IP with MGBASE-T Ethernet design higher than the expected value?

Environment

  • Intel® Quartus® Prime Pro Edition
  • 1G 2.5G 5G 10G Multi-rate Ethernet PHY
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    Description

    Due to a problem in the Quartus® Prime Pro Edition Software Version 22.3, Stratix® 10 PTP designs using the 1G/2.5G/5G/10G Multirate Ethernet PHY FPGA IP MGBASE-T variant may observe high timestamp accuracy error. This problem will impact rates of 2.5Gbps and lower.

     

     

    Resolution

    There is no workaround for this problem. This problem is scheduled to be fixed in a future release of the Quartus® Prime Pro Edition Software.

    Related Products

    This article applies to 1 products

    Intel® Stratix® 10 FPGAs and SoC FPGAs

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