Article ID: 000095620 Content Type: Error Messages Last Reviewed: 08/07/2023

The user-initiated HBM-only reset is currently not supported when using the High Bandwidth Memory (HBM2) Interface Intel® FPGA IP

Environment

  • Intel® Quartus® Prime Pro Edition
  • High Bandwidth Memory (HBM2) Interface Intel® FPGA IP
    • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    You will not see correct reset sequence behavior in RTL simulation when the HBM reset is triggered in the Intel® Quartus® Prime Pro Edition Software version 22.3 or later.

     

     

    Resolution

    This problem is scheduled to be fixed in a future release of the Intel® Quartus® Prime Pro Edition Software.

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