Article ID: 000094976 Content Type: Errata Last Reviewed: 08/02/2023

Why does the O-RAN Intel® FPGA IP "TX_TOTAL" register (0xD9 & 0xDA) not count packets as per the O-RAN Specification?

Environment

    Intel® Quartus® Prime Pro Edition
    Interfaces
BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

Due to a problem in the O-RAN Intel® FPGA IP Webcore version 22.3 and earlier, the TX_TOTAL register of O-RAN Intel® FPGA IP incorrectly counts packets received from the O-RAN Intel® FPGA IP Application Interface.

As per the O-RAN specification for UL TX, the TX_TOTAL register should only count packets sent via the O-RAN Intel® FPGA IP Transport Interface.

 

 

Resolution

This problem has been fixed in Webcore version 23.2 of the O-RAN Intel® FPGA IP.

Related Products

This article applies to 3 products

Intel Agilex® 7 FPGAs and SoC FPGAs
Intel® Arria® 10 FPGAs and SoC FPGAs
Intel® Stratix® 10 FPGAs and SoC FPGAs

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