Why is there no compatibility between the eCPRI Intel® FPGA IP and the Ethernet Intel® FPGA Hard IP in the Intel® Quartus® Prime Pro Edition Software version 23.1 and earlier?

When the eCPRI Intel® FPGA IP is connected to the Ethernet Intel® FPGA Hard IP TX MAC interface, there's a possibility of receiving irrelevant data at the Ethernet Intel FPGA Hard IP output because the eCPRI Intel FPGA IP MAC source interface doesn't comply with the VALID signal requirement of the TX MAC interface.

To establish the connection between the eCPRI Intel FPGA IP and the Ethernet Intel FPGA Hard IP, a Store and Forward FIFO must be utilized between the MAC source interface of eCPRI Intel FPGA IP and the TX MAC Interface of Ethernet Intel FPGA Hard IP.
This problem is scheduled to be fixed in a future release of the Intel® Quartus® Prime Pro Edition Software.